3.1. Security Handling

3.1.1. Security Disclosures

We disclose all security vulnerabilities we find, or are advised about, that are relevant to Trusted Firmware-A. We encourage responsible disclosure of vulnerabilities and inform users as best we can about all possible issues.

We disclose TF-A vulnerabilities as Security Advisories, all of which are listed at the bottom of this page. Any new ones will, additionally, be announced on the TF-A project’s mailing list.

3.1.2. Found a Security Issue?

Although we try to keep TF-A secure, we can only do so with the help of the community of developers and security researchers.

Warning

If you think you have found a security vulnerability, please do not report it in the issue tracker or on the mailing list. Instead, please follow the TrustedFirmware.org security incident process.

One of the goals of this process is to ensure providers of products that use TF-A have a chance to consider the implications of the vulnerability and its remedy before it is made public. As such, please follow the disclosure plan outlined in the process. We do our best to respond and fix any issues quickly.

Afterwards, we encourage you to write-up your findings about the TF-A source code.

3.1.3. Attribution

We will name and thank you in the Change Log & Release Notes distributed with the source code and in any published security advisory.

3.1.4. Security Advisories

ID	Title
Advisory TFV-1 (CVE-2016-10319)	Malformed Firmware Update SMC can result in copy of unexpectedly large data into secure memory
Advisory TFV-2 (CVE-2017-7564)	Enabled secure self-hosted invasive debug interface can allow normal world to panic secure world
Advisory TFV-3 (CVE-2017-7563)	RO memory is always executable at AArch64 Secure EL1
Advisory TFV-4 (CVE-2017-9607)	Malformed Firmware Update SMC can result in copy or authentication of unexpected data in secure memory in AArch32 state
Advisory TFV-5 (CVE-2017-15031)	Not initializing or saving/restoring PMCR_EL0 can leak secure world timing information
Advisory TFV-6 (CVE-2017-5753, CVE-2017-5715, CVE-2017-5754)	Trusted Firmware-A exposure to speculative processor vulnerabilities using cache timing side-channels
Advisory TFV-7 (CVE-2018-3639)	Trusted Firmware-A exposure to cache speculation vulnerability Variant 4
Advisory TFV-8 (CVE-2018-19440)	Not saving x0 to x3 registers can leak information from one Normal World SMC client to another
Advisory TFV-9 (CVE-2022-23960)	Trusted Firmware-A exposure to speculative processor vulnerabilities with branch prediction target reuse
Advisory TFV-10 (CVE-2022-47630)	Incorrect validation of X.509 certificate extensions can result in an out-of-bounds read
Advisory TFV-11 (CVE-2023-49100)	A Malformed SDEI SMC can cause out of bound memory read
Advisory TFV-12 (CVE-2024-5660)	When Hardware Page Aggregation (HPA) is enabled memory accesses may be translated incorrectly.
Advisory TFV-13 (CVE-2024-7881)	An unprivileged context can trigger a data memory-dependent prefetch engine to fetch the contents of a privileged location and consume those contents as an address that is also dereferenced.
Advisory TFV-14 (CVE-2026-34879)	BL1 FWU range-check mismatch in FWU_SMC_IMAGE_COPY can cause out-of-range memory access.
Advisory TFV-15 (CVE-2026-34878)	Insufficient validation of FIP ToC offsets in BL1/BL2 can cause unintended reads and secure memory disclosure at boot.
Advisory TFV-16 (CVE-2026-0995)	SME erratum in C1-Pro means memory accesses from the SME unit can remain outstanding after another CPU issues TLBI+DSB
Advisory TFV-17 (CVE-2025-10263)	TLBI+DSB might complete too early