13. Change Log & Release Notes
This document contains a summary of the new features, changes, fixes and known issues in each release of Trusted Firmware-A.
13.1. 2.11.0 (2024-05-17)
13.1.1. ⚠ BREAKING CHANGES
Architecture
Memory Tagging Extension2
Any platform or downstream code trying to use SCR_EL3.ATA bit(26) will see failures as this is now moved to be used only with FEAT_MTE2 with commit@ef0d0e5478a3f19cbe70a378b9b184036db38fe2
See: remove mte, mte_perm (c282384)
Services
SPM
SPMD
Given the optimizations made in TF-A SPMD to simplify NS EL1 context management, platform integrators must use SPMC binaries built by picking commits after 2fc6dcfa97e05159f95859fcf68db3031586f8c7 from hafnium repository.
See: skip NS EL1 context save & restore operations (2d960a1)
Drivers
Arm
RSE
remove PLAT_RSS_NOT_SUPPORTED build option
See: remove PLAT_RSS_NOT_SUPPORTED build option (878354a)
FWU
add a config flag for including image info in the FWU metadata (11d05a7)
add a function to obtain an alternate FWU bank to boot (26aab79)
add some sanity checks for the FWU metadata (d2566cf)
document the config flag for including image info in the FWU metadata (7ae1619)
migrate FWU metadata structure to version 2 (a89d58b)
13.1.2. New Features
Architecture
Platforms
update SZ_* macros (6d511a8)
Arm
add COT_DESC_IN_DTB option for CCA CoT (b76a43c)
add trusty_sp_fw_config build option (0686a01)
move GPT setup to common BL source (341df6a)
retrieve GPT related data from platform (86e4859)
support FW handoff b/w BL1 & BL2 (9c11ed7)
support FW handoff b/w BL2 & BL31 (a5566f6)
add platform API that gets cluster ID (e6ae019)
CSS
initialise generic timer early in the boot (3447ba1)
FVP
Neoverse-RD
add scope for RD-V1 (86a4949)
add scope for RD-V1-MC (6fb16da)
add scope for SGI-575 (18b5070)
disable SPMD_SPM_AT_SEL2 for A75/V1/N1 platforms (b9c3273)
disable SPMD_SPM_AT_SEL2 for N2/V2 platforms (301c017)
enable AMU if supported by the platform (fed9368)
remove unused SGI_PLAT build-option (2d32517)
SGI-575
remove SGI-575 from deprecated list (f104eec)
RD-E1-Edge
remove support for RD-E1-Edge (c69253c)
RD-N1-Edge
remove RD-N1-Edge from deprecated list (78b7939)
RD-N2
TC
add arm_ffa node in dts (4fc4e9c)
add DPE backend to the measured boot framework (e7f1181)
add DPE context handle node to device tree (1f47a71)
add dummy TRNG support to be able to boot pVMs (7be391d)
add firmware update secure partition (d062872)
add memory node in the device tree (5ee4deb)
add PMU entry (553b06b)
add RSS SDS region right after SCMI payload (6f503e0)
add save/restore DSU PMU register support (b87d7ab)
add SCMI power domain and IOMMU toggles (a658b46)
add spmc manifest with trusty sp (ba197f5)
add TC3 platform definitions (62320dc)
allow booting from DRAM (18f754a)
choose the DPU address and irq based on the target (8e94163)
enable gpu/dpu scmi power domain and also gpu perf domain (127eabe)
factor in FVP/FPGA differences (1b8ed09)
get the parent component provided DPE context_handle (467bdf2)
group components into certificates (6df8d76)
interrupt numbers for
smmu_700
(2c406dd)introduce an FPGA subvariant and TC3 CPUs (a02bb36)
pass the DTB address to BL33 in R0 (638e4a9)
provide a mock mbedtls-random generation function (a877818)
share DPE context handle with child component (03d388d)
Intel
add in QSPI ECC for Linux (4d122e5)
enable query of fip offset on RSU (6cbe2c5)
enable SDMMC frontdoor load for ATF->Linux (32a87d4)
increase bl2 size limit (2d46b2e)
restructure watchdog (47ca43b)
support QSPI ECC Linux for Agilex (d6ae69c)
support QSPI ECC Linux for N5X (6cf16b3)
support QSPI ECC Linux for Stratix10 (8be16e4)
support query of fip offset using RSU (62be2a1)
support SDM mailbox safe inject seu error for Linux (fffcb25)
support wipe DDR after calibration (68bb3e8)
MediaTek
NXP
i.MX
i.MX 8M
add 3600 MTps DDR PLL rate (f1bb459)
add defines for csu_sa access security (81de503)
add imx csu_sa enum type defines for imx8m (2ac4909)
make bl33 start configurable via PRELOADED_BL33_BASE (9260a8c)
obtain boot image set for imx8mn/mp (6d2c502)
i.MX 8M Mini
i.MX 8M Plus
i.MX 8Q
detect console base address during runtime (52ee817)
i.MX 8ULP
add a flag check for the ddr status (4fafccb)
add APD power down mode(PD) support in system suspend (478af8d)
add i.MX8ULP basic support (fcd41e8)
add memory region policy (5fd0642)
add OPTEE support (e7b82a7)
add some delay before cmc1 access (c514d3c)
add system power off support (891c547)
add the basic support for idle & system suspned (daa4478)
add the initial XRDC support (ac5d69b)
add trusty support (e853041)
adjust the dram mapped region (8d50c91)
adjust the voltage when sys dvfs enabled (416c443)
allocated caam did for the non secure world (7c5eedc)
allow RTD to reset APD through MU (ea1f7a2)
ddrc switch auto low power and software interface (ee25e6a)
enable 512KB cache after resume on imx8ulp (bcca70b)
enable the DDR frequency scaling support (caee273)
give HIFI4 DSP access to more resources (351976b)
not power off LPAV PD when LPAV owner is RTD (ab787db)
protect TEE region for secure access only (ff5e179)
update the upower config for power optimization (36af80c)
update XRDC for ELE to access DDR with CA35 DID (d159c00)
S32G274A
QEMU
allow ARM_ARCH_MAJOR/MINOR override (e769f83)
enable FEAT_ECV when present (1b694c7)
enable transfer list to BL31/32 (305825b)
load and run RMM image (8ffe0b2)
setup Granule Protection Table (6cd113f)
setup memory map for RME (cd75693)
support TRP for RME (ebe82a3)
update mapping types for RME (a5ab1ef)
update to manifest v0.3 (762a1c4)
use mock attestation functions for RME (c69e95e)
SBSA
Raspberry Pi
add Raspberry Pi 5 support (f834b64)
Renesas
ST
add a function to clear the FWU trial state counter (6e99fee)
add logic to boot the platform from an alternate bank (6166051)
do not directly call BSEC functions in common code (3007c72)
get the state of the active bank directly (588b01b)
use stm32_get_otp_value_from_idx() in BL31 (189db94)
STM32MP1
only fuse monotonic counter on closed devices (d6bb94f)
STM32MP2
Xilinx
add handler for power down req sgi irq (ade92a6)
add new state to identify cpu power down (5949701)
add wrapper to handle cpu power down req (3dd118c)
power down all cores on receiving cpu pwrdwn req (c3280df)
request cpu power down from reset (88ee081)
send SGI to mailbox driver (9a7f892)
Versal
ZynqMP
remove unused pm_get_proc_by_node() (b03ba48)
Bootloader Images
BL32
create an sp_min_setup function (a1255c7)
Services
FF-A
update FF-A version to v1.2 (e830e4c)
RME
SPM
EL3 SPMC
add support for FFA_CONSOLE_LOG (638a6f8)
add support for FFA_MEM_PERM_GET and SET ABIs (1f6b2b2)
add support to handle power mgmt calls for s-el0 sp (5917379)
add support to map S-EL0 SP device regions (727ab1c)
add support to map S-EL0 SP memory regions (83c3da7)
add support to setup S-EL0 context (48db2b0)
synchronize access to the s-el0 sp context (5ed8e25)
SPMD
DRTM
ChromeOS
add ChromeOS widevine SMC handler (b22e689)
Libraries
CPU Support
EL3 Runtime
introduce UNDEF injection to lower EL (3c789bf)
FCONF
support signing-key in root cert node (04ac0b3)
OP-TEE
enable transfer list in opteed (0e8def9)
PSCI
add psci_do_manage_extensions API (160e843)
GPT
validate CRC of GPT partition entries (7a9e9f6)
SMCCC
C Standard Library
add printf support for space padding (0926d2d)
Locks
add bitlock (222f885)
DICE Protection Environment (Experimental)
Context Management
Firmware Handoff
Drivers
Miscellaneous
Documentation
update maintainer list for neoverse_rd (2d7902d)
Build System
Tools
Memory Mapping Tool
add RELA section display (a6462e0)
13.1.3. Resolved Issues
Architecture
Platforms
Arm
move console flush/switch in common function (6bdc856)
only expose
arm_bl2_dyn_cfg_init
to BL2 (3b48ca1)FVP
FPGA
halve number of PEs per core (70b9204)
Neoverse-RD
TC
correct interrupts (d2e44e7)
do not enable MPMM and Aux AMU counters always (fc42f84)
do not use r0 for HW_CONFIG (a5a966b)
enable FEAT_MTE2 (154eb0a)
guard PSA crypto headers under TF-M test-suite define (d2ce6aa)
increase BL2 maximum size limit (19258a5)
increase stack size when TRUSTED_BOARD_BOOT=0 (44ddee6)
missing device regions in spmc manifest (5e47112)
remove timer interrupt from G1S (9bf31a5)
Intel
add HPS remapper to remap base address for SDM (b727664)
bl31 overwrite OCRAM configuration (cfbac59)
fix hardcoded mpu frequency ticks (150d2be)
read QSPI bank buffer data in bytes (2f17ac0)
revert back to use L4 clock (d0e400b)
revert sys counter to 400MHz (460692a)
temporarily workaround for Zephyr SMP (68820f6)
update DDR range checking for Agilex5 (f4aaa9f)
update fcs crypto init code to check for mode (b0f4478)
update fcs functions to check ddr range (e8a3454)
update from INFO to VERBOSE when print debug message (56c8d02)
update HPS bridges for Agilex5 SoC FPGA (2973054)
update individual return result for hps and fpga bridges (82752c4)
update nand driver to match GHRD design (a773f41)
update stream id to non-secure for SDM (8fbd307)
update system counter back to 400MHz (a72f86a)
NXP
i.MX
i.MX 8M
i.MX 8ULP
QEMU
Raspberry Pi
consider MT when calculating core index from MPIDR (6744d07)
Renesas
Rockchip
ST
Texas Instruments
Xilinx
add console_flush() before shutdown (7ec53af)
add FIT image check in DT console (e2d9dfe)
add FIT image check in prepare_dtb (046e130)
check proc variable before use (652c1ab)
deprecate SiP service count query (6a80c20)
fix sending sgi to linux (427e46d)
follow MISRA-C standards for condition check (655e62a)
rename macros to align with ARM (7995319)
update correct return types (8eb6a1d)
Versal
ZynqMP
resolve null pointer dereferencing (20fa9fc)
Nuvoton
Bootloader Images
Services
Libraries
CPU Support
workaround for Cortex-A520 erratum 2630792 (f03bfc3)
workaround for Cortex-A520 erratum 2858100 (34db353)
workaround for Cortex-A710 erratum 2778471 (c9508d6)
workaround for Cortex-A715 erratum 2331818 (53b3cd2)
workaround for Cortex-A715 erratum 2344187 (33c665a)
workaround for Cortex-A715 erratum 2413290 (15a0461)
workaround for Cortex-A715 erratum 2420947 (1f73247)
workaround for Cortex-A715 erratum 2429384 (262dc9f)
workaround for Cortex-A715 erratum 2561034 (6a6b282)
workaround for Cortex-A715 erratum 2728106 (10134e3)
workaround for Cortex-A720 erratum 2926083 (152f4cf)
workaround for Cortex-A720 erratum 2940794 (7385213)
workaround for Cortex-A78C erratum 2683027 (68cac6a)
workaround for Cortex-A78C erratum 2743232 (81d4094)
workaround for Cortex-X2 erratum 2778471 (b01a93d)
workaround for Cortex-X3 erratum 2266875 (a65c5ba)
workaround for Cortex-X3 erratum 2302506 (3f9df2c)
workaround for Cortex-X3 erratum 2372204 (7f69a40)
workaround for Cortex X3 erratum 2641945 (c1aa3fa)
workaround for Cortex X3 erratum 2743088 (f43e9f5)
workaround for Cortex-X3 erratum 2779509 (355ce0a)
workaround for Cortex-X4 erratum 2701112 (cc41b56)
workaround for Cortex-X4 erratum 2740089 (c833ca6)
workaround for Cortex-X4 erratum 2763018 (4731211)
workaround for Neoverse V1 erratum 2348377 (71ed917)
workaround for Neoverse V2 erratum 2618597 (c0f8ce5)
workaround for Neoverse V2 erratum 2662553 (912c409)
workaround for Neoverse V2 erratum 3099206 (8815cda)
add Cortex-A520 definitions (ae19093)
workaround for Cortex-A715 erratum 2413290 re-factored with ENABLE_SPE_FOR_NS=1 (bd2f7d3)
fix a defect in Cortex-A715 erratum 2561034 (57ab6d8)
add erratum 2701951 to Cortex-X3’s list (106c428)
update status of Cortex-X3 erratum 2615812 (f589a2a)
fix incorrect AMU trap settings for N2 CPU (54b86d4)
correct variant name for default Poseidon CPU (61a2968)
check for SCU before accessing DSU (5b5562b)
EL3 Runtime
Context Management
add more feature registers to EL1 context mgmt (d6c76e6)
add more system registers to EL1 context mgmt (ed9bb82)
hide
cm_init_context_by_index
from BL1 (a6b3643)remove ENABLE_FEAT_MTE usage (a796d5a)
save guarded control stack registers (6aae3ac)
update gic el2 sysregs save/restore mechanism (937d6fd)
couple el2 registers with dependent feature flags (d6af234)
move EL1 save/restore routines into C (59f8882)
FCONF
boot fails using ARM_ARCH_MINOR=8 (0c86a84)
OP-TEE
set interrupt handler before kernel boot (0ec69a5)
PSCI
GPT
C Standard Library
PSA
fix static check failure (bc0ff02)
Context Management
align the memory address of EL2 context registers (8c56a78)
Firmware Handoff
correct representation of tag_id (d594ace)
Exception Handling Framework (EHF)
restrict secure world FIQ routing model to SPM_MM (7671008)
SMCCC
correctly find pmf version (62865b4)
Drivers
Miscellaneous
Documentation
Build System
add forgotten BL_LDFLAGS to lto command line (49ba1df)
don’t generate build-id (304ad94)
don’t rely on that gcc-ar is in the same directory as gcc (7ef0b83)
enforce single partition for LTO build (31f80ef)
march handling with arch-features (7275ac2)
move comment for VERSION_PATCH (c25d1cc)
mute sp_mk_generator from build log (fbd32ac)
properly manage versions in .versionrc.js (7f74030)
wrap toolchain paths in double quotes (4731c00)
Tools
Certificate Creation Tool
Memory Mapping Tool
Marvell Tools
include mbedtls/version.h before use (8eb4efe)
13.2. 2.10.0 (2023-11-21)
13.2.1. ⚠ BREAKING CHANGES
Architecture
Performance Monitors Extension (FEAT_PMUv3)
This patch explicitly breaks the EL2 entry path. It is currently unsupported.
See: convert FEAT_MTPMU to C and move to persistent register init (83a4dae)
Libraries
EL3 Runtime
Context Management
Initialisation code for handoff from EL3 to NS-EL1 disabled by default. Platforms which do that need to enable this macro going forward
See: introduce INIT_UNUSED_NS_EL2 macro (183329a)
Drivers
Authentication
remove CryptoCell-712/713 support
See: remove CryptoCell-712/713 support (b65dfe4)
13.2.2. New Features
Architecture
Platforms
Allwinner
use reset through scpi for warm/soft reset (0cf5f08)
Arm
add IO policy to use backup gpt header (3e6d245)
ecdsa p384/p256 full key support (b8ae689)
enable FHI PPI interrupt to report CPU errors (f1e4a28)
reuse SPM_MM specific defines for SPMC_AT_EL3 (5df1dcc)
save BL32 image base and size in entry point info (821b01f)
add memory map entry for CPER memory region (4dc91ac)
firmware first error handling support for base RAMs (5b77a0e)
update common platform RAS implementation (7f15131)
FVP
add mbedtls_asn1_get_len symbol in ROMlib (0605060)
add public key-OID information in RSS metadata structure (bfbb1cb)
add spmd logical partition (5cf311f)
allow configurable FVP Trusted SRAM size (41e56f4)
capture timestamps in bl stages (ed8f06d)
implement platform function to measure and publish Public Key (db55d23)
increase BL1 RW area for PSA_CRYPTO implementation (ce18938)
mock support for CCA NV ctr (02552d4)
new SiP call to set an interrupt pending (2032401)
spmd logical partition smc handler (a1a9a95)
Juno
add mbedtls_asn1_get_len symbol in ROMlib (ec8ba97)
Morello
RD
RD-N2
enable base element RAM RAS support on RD-N2 platform (0288632)
add defines needed for spmc-el3 (b4bed4b)
add plat hook for memory transaction (f99dcba)
enable Neoverse N2 CPU error handling support (e802748)
introduce accessor function to obtain datastore (f458934)
introduce platform handler for Group0 interrupt (c47d049)
SGI
TC
Aspeed
AST2700
add Aspeed AST2700 platform support (85f199b)
Intel
add intel_rsu_update() to sip_svc_v2 (e3c3a48)
ccu driver for Agilex5 SoC FPGA (02df499)
clock manager support for Agilex5 SoC FPGA (1b1a3eb)
cold/warm reset and smp support for Agilex5 SoC FPGA (79626f4)
ddr driver for Agilex5 SoC FPGA (29461e4)
mailbox and SMC support for Agilex5 SoC FPGA (8e59b9f)
memory controller support for Agilex5 SoC FPGA (18adb4e)
mmc support for Agilex5 SoC FPGA (4a577da)
pinmux, peripheral and Handoff support for Agilex5 SoC FPGA (fcbb5cf)
platform enablement for Agilex5 SoC FPGA (7931d33)
power manager for Agilex5 SoC FPGA (a8bf898)
reset manager support for Agilex5 SoC FPGA (9b8d813)
restructure sys mgr for Agilex (6197dc9)
restructure sys mgr for S10/N5X (b653f3c)
sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA (ddaf02d)
setup SEU ERR read interface for FP8 (91239f2)
system manager support for Agilex5 SoC FPGA (7618403)
uart support for Agilex5 SoC FPGA (34971f8)
vab support for Agilex5 SoC FPGA (4754925)
MediaTek
add APU bootup control smc call (94a9e62)
add APU watchdog timeout control (baa0d45)
MT8188
add apusys ao devapc setting (777e3b7)
add backup/restore function when power on/off (233d604)
add devapc setting of apusys rcx (5986ae5)
add DSB before udelay (b254b98)
add emi mpu protection for APU secure memory (176846a)
add EMI MPU support for SCP and DSP (013006f)
add support for SMC from OP-TEE (34d9d61)
enable apusys domain remap (b5900c9)
enable apusys mailbox mpu protect (ad7673a)
increase TZRAM_SIZE from 192KB to 256KB (aa1cb27)
modify APU DAPC permission (d06edab)
update return value in mtk_emi_mpu_sip_handler (d07eee2)
MT8195
increase TZRAM (4f79b67)
NXP
i.MX
add dummy ‘plat_mboot_measure_key’ function (b9bceef)
i.MX 8M
i.MX 9
i.MX93
add cpuidle and basic suspend support (422d30c)
add OPTEE support (27a0be7)
add reset & poweroff support (cf7ef4c)
add the basic support (2368d7b)
add the trdc driver (2935291)
allow SoC masters access to system TCM (3d3b769)
protect OPTEE memory to secure access only (f560f84)
update the ocram trdc config for did10 (eb76a24)
QEMU
add sdei support for QEMU (cef76a7)
add “cortex-a710” cpu support (4734a62)
add “neoverse-n2” cpu support (408f9cb)
add “neoverse-v1” cpu support (6d8d7d2)
add “neoverse-v1” cpu support (214de62)
add A55 cpu support for virt (409c20c)
add dummy plat_mboot_measure_key() BL1 function (8e2fd6a)
add dummy plat_mboot_measure_key() function (f0f11ac)
implement firmware handoff on qemu (322af23)
SBSA
QTI
MSM8916
add port for MDM9607 (78aac78)
add port for MSM8909 (cf0a75f)
add port for MSM8939 (c28e96c)
add SP_MIN port for AArch32 (45b2bd0)
add Test Secure Payload (TSP) port (6b8f9e1)
allow selecting which UART to use (aad23f1)
clear CACHE_LOCK for MMU-500 r2p0+ (d9b0442)
initialize CCI-400 for multiple clusters (1240dc7)
power on L2 caches for secondary clusters (c822d26)
ST
Texas Instruments
Xilinx
add support to get chipid (0563601)
clean macro names (bfd0626)
fix IPI calculation for Versal/NET (69a5bee)
move IPI related macros to plat_ipi.h (b2258ce)
remove crash console unused macros (473ada6)
setup local/remote id in header (068b0bc)
switch boot console to runtime (9c1c8f0)
sync macro names (04a4833)
used console also as crash console (3e6b96e)
Versal
add support for SMCC ARCH SOC ID (079c6e2)
add tsp support (7ff4d4f)
ddr address reservation in dtb at runtime (56d1857)
enable assertion (0375188)
retrieval of console information from dtb (7c36fbc)
Versal NET
add cluster check in handoff parameters (01c8c6a)
add support for SMCC ARCH SOC ID (1873e7f)
add the IPI CRC checksum macro support (ba56b01)
add tsp support (639b367)
ddr address reservation in dtb at runtime (46a08aa)
enable assertion (80cb4b1)
get the handoff params using IPI (a36ac40)
remove empty crash console setup (6a14246)
retrieval of console information from dtb (a467e81)
ZynqMP
Nuvoton
added support for npcm845x chip (edcece1)
Bootloader Images
Services
RME
SPM
ERRATA ABI
add support for Cortex-X3 (9c16521)
Libraries
CPU Support
add a concise way to implement AArch64 errata (3f4c1e1)
add a way to automatically report errata (4f748cc)
add errata framework helpers (445f7b5)
add more errata framework helpers (94a75ad)
add support for Gelas CPU (02586e0)
add support for hermes cpu (a00e907)
add support for Nevis CPU (5497958)
add support for Travis CPU (a0594ad)
conform DSU errata to errata framework PCS (ee6d04d)
make revision procedure call optional (4d22b0e)
wrappers to propagate AArch32 errata info (34c51f3)
EL3 Runtime
Translation Tables
detect 4KB and 16KB page support when FEAT_LPA2 is present (bff074d)
C Standard Library
PSA
interface with RSS for retrieving ROTPK (50316e2)
Firmware Handoff
Drivers
Authentication
add CCA NV ctr to CCA CoT (e3b1cc0)
add explicit entries for key OIDs (0cffcdd)
create a zero-OID for Subject Public Key (9505d03)
ecdsa p384 key support (557f7d8)
measure and publicise the Public Key (9eaa5a0)
mbedTLS
mbedTLS-PSA
initialise mbedtls psa crypto (4eaaaa1)
introduce PSA_CRYPTO build option (5782b89)
mbedTLS PSA Crypto with ECDSA (255ce97)
register an ad-hoc PSA crypto driver (38f8936)
use PSA crypto API during hash calculation (484b586)
use PSA crypto API during signature verification (eaa62e8)
use PSA crypto API for hash verification (2ed061c)
Measured Boot
introduce platform function to measure and publish Public Key (2971bad)
GUID Partition Tables Support
Arm
ST
Miscellaneous
Documentation
Build System
include plat header in fdt build (e03dcc8)
manage patch version in Makefile (055ebec)
march option selection (7794d6c)
pass CCA NV ctr option to cert_create (0f19b7a)
.gitignore to include memory tools (82257de)
allow gcc linker on Aarch32 platforms (cfe6767)
bump certifi to version 2023.7.22 (6cbf432)
convert tabs and ifdef comparisons (72f027c)
convert tabs to spaces (1ca73b4)
disable ENABLE_FEAT_MPAM for Aarch32 (a07b459)
include Cortex-A78AE cpu file for FVP (b996db1)
pass parameters through response files (430be43)
remove duplicated include order (c189adb)
remove handling of mandatory options (1ca902a)
Tools
13.2.3. Resolved Issues
Architecture
CPU feature / ID register handling in general
move nested virtualization support to optionals (8b2048c)
Memory Partitioning and Monitoring (MPAM) Extension (FEAT_MPAM)
refine MPAM initialization and enablement process (edebefb)
Performance Monitors Extension (FEAT_PMUv3)
make MDCR_EL3.MTPME=1 out of reset (33815eb)
Platforms
register PLAT_SP_PRI only if not already registered (bf01999)
Arm
add Event Log area behind Trustzone Controller (d836df7)
correct the SPMC_AT_EL3 condition (a0ef1c0)
fix GIC macros for GICv4.1 support (f1df8f1)
add RAS_FFH_SUPPORT check for RAS EHF priority (1c01284)
do not program DSU CLUSTERPWRDN register (3209b35)
FPGA
enable CPU features required for ARMv9.2 cores (b321c24)
FVP
adjust BL2 maximum size as per total SRAM size (965aace)
adjust BL31 maximum size as per total SRAM size (24e224b)
conditionally increase XLAT and MMAP table entries (03cf4e9)
extract core id from mpidr for pwrc operations (70bc744)
increase maximum MMAP and XLAT entries count (12fe591)
increase the maximum size of Event Log (f1dfaa4)
resolve broken workaround reference (bcb3ea9)
update pwr_domain_suspend (f51d277)
update system suspend in OS-initiated mode (e0ef05b)
Morello
configure platform specific secure SPIs (80f8769)
N1SDP
SGI
update PLAT_SP_PRI macro definition (6f689a5)
TC
Corstone-1000
Aspeed
AST2700
add device mapping for coherent memory (cef2e92)
Broadcom
fix misspelled header inclusion guard (a9779c1)
Cadence
update console flush uart driver (e27bebb)
Intel
MediaTek
support saving/restoring GICR registers (f73466e)
NVIDIA
Tegra
return correct error code for plat_core_pos_by_mpidr (6bd79b1)
NXP
QEMU
QTI
Renesas
ST
allow crypto lib compilation in aarch64 (76e4fab)
enable RTC clock before accessing nv counter (77ce6a5)
flush UART at the end of uart_read() (a9cb7d0)
properly check LOADADDR (9f72f5e)
reduce MMC block_buffer (a2500ab)
setting default KEY_SIZE (6f3ca8a)
update comment on encryption key (5c506c7)
update dt_get_ddr_size() type (2a4abe0)
STM32MP1
Texas Instruments
Xilinx
add headers to resolve compile time issue (744d60a)
dcache flush for dtb region (93ed138)
don’t reserve 1 more byte (c3b69bf)
dynamic mmap region for dtb (7ca7fb1)
remove clock_setrate and clock_getrate api (e5955d7)
remove console error message (f9820f2)
update dtb when dtb address and tf-a ddr flow is used (fdf8f92)
DCC (Debug Communication Channel)
Versal
add missing irq mapping for wakeup src (06b9c4c)
fix BLXX memory limits for user defined values (f123b91)
make pmc ipi channel as secure (96eaafa)
type cast addresses to fix integer overflow (bfe82cf)
use correct macro name for ocm base address (56afab7)
Versal NET
add redundant call to avoid glitches (cebb7cc)
change flag to increase security (e8efb65)
correct device node indexes (66b5620)
don’t clear pending interrupts (fb73ea6)
fix BLXX memory limits for user defined values (a80da38)
make pmc ipi channel as secure (2c65b79)
use correct macro name for uart baudrate (e2ef1df)
ZynqMP
do not export apu_ipi (237c5a7)
fix BLXX memory limits for user defined values (8ce2fbf)
fix prepare_dtb() memory description (3efee73)
fix sdei arm_validate_ns_entrypoint() (3b3c70a)
handling of type el3 interrrupts (e8d61f7)
make zynqmp_devices structure smaller (7e3e799)
remove unused headers (6288636)
resolve runtime error in TSP (81ad3b1)
type cast addresses to fix overflow issue (9129163)
validate clock_id to avoid OOB variable access (abc79c2)
Nuvoton
fix typo in platform.mk (c7efb78)
Bootloader Images
Services
RME
RMMD
enable sme using sme_enable_per_world (c0e16d3)
SPM
EL3 SPM
EL3 SPMC
avoid descriptor size calc overflow (27c0242)
correctly account for emad_offset (0c2583c)
fix incorrect CASSERT (1dd79f9)
only call spmc_shm_check_obj() on complete objects (d781959)
prevent total_page_count overflow (2d4da8e)
remove experimental flag (630a06c)
use uint64_t for 64-bit type (43318e4)
use version-dependent minimum descriptor length (52d8d50)
validate descriptor headers (56c052d)
validate memory address alignment (327b5b8)
validate shmem descriptor alignment (dd94372)
SPMD
ERRATA ABI
Libraries
CPU Support
assert invalid cpu_ops obtained (3f721c6)
check for SME presence in Gelas (0bbd432)
fix minor issue seen with a9 cpu (af70470)
fix the rev-var for Cortex-A710 (2bf7939)
fix the rev-var of Cortex-X2 (8ae66d6)
fix the rev-var of Neoverse-V1 (ab2b56d)
flush L2 cache for Cortex-A7/12/15/17 (c5c160c)
integer suffix macro definition (1a56ed4)
reduce generic_errata_report()’s size (f43e09a)
revert erroneous use of override_vector_table macro in Cortex-A73 (9a0c812)
update the fix for Cortex-A78AE erratum 1941500 (67a2ad1)
update the rev-var for Cortex-A78AE (c814619)
workaround for Cortex-A510 erratum 2080326 (6e86475)
workaround for Cortex-A710 erratum 2742423 (d7bc2cb)
workaround for Cortex-X2 erratum 2742423 (fe06e11)
workaround for Cortex-X3 erratum 2070301 (2454316)
workaround for Cortex-X3 erratum 2742421 (5b0e443)
workaround for Neoverse N2 erratum 2009478 (74bfe31)
workaround for Neoverse N2 erratum 2340933 (68085ad)
workaround for Neoverse N2 erratum 2346952 (6cb8be1)
workaround for Neoverse N2 erratum 2743014 (eb44035)
workaround for Neoverse N2 erratum 2779511 (12d2806)
workaround for Neoverse V2 erratum 2331132 (8852fb5)
workaround for Neoverse V2 erratum 2719105 (b011402)
workaround for Neoverse V2 erratum 2743011 (58dd153)
workaround for Neoverse V2 erratum 2779510 (ff34264)
workaround for Neoverse V2 erratum 2801372 (40c81ed)
EL3 Runtime
PSCI
add optional pwr_domain_validate_suspend to plat_psci_ops_t (d348861)
SMCCC
Translation Tables
Drivers
Authentication
Measured Boot
don’t strip last non-0 char (b85bcb8)
MMC
initialises response buffer with zeros (b1a2c51)
MTD
SCMI
add parameter for plat_scmi_clock_rates_array (ca9d6ed)
UFS
Arm
Renesas
R-Car3
update DDR setting (138ddcb)
ST
Miscellaneous
Documentation
match boot-order size to implementation (fd1479d)
add missing line in the fiptool command for stm32mp1 (d526d00)
fix build errors for latexpdf (443d6ea)
remove out-dated information about CI review comments (74306b2)
replace deprecated urls under tfa/docs (5fdf198)
update maintainers list (9766f41)
updated certain Neoverse N2 erratum status in docs (d6d34b3)
use rsvg-convert as the conversion backend (c365476)
Tools
13.3. 2.9.0 (2023-05-16)
13.3.1. ⚠ BREAKING CHANGES
Libraries
EL3 Runtime
RAS
The previous RAS_EXTENSION is now deprecated. The equivalent functionality can be achieved by the following 2 options:
ENABLE_FEAT_RAS
RAS_FFH_SUPPORT
See: replace RAS_EXTENSION with FEAT_RAS (9202d51)
Drivers
Authentication
unify REGISTER_CRYPTO_LIB
See: unify REGISTER_CRYPTO_LIB (dee99f1)
Arm
Ethos-N
The Linux Kernel NPU driver can no longer directly configure and boot the NPU in a TZMP1 build. The API version has therefore been given a major version bump with this change.
See: add protected NPU firmware setup (6dcf3e7)
Building the FIP when TZMP1 support is enabled in the NPU driver now requires a parameter to specify the NPU firmware file.
See: load NPU firmware at BL2 (33bcaed)
Build System
BL2_AT_EL3 renamed to RESET_TO_BL2 across the repository.
See: distinguish BL2 as TF-A entry point and BL2 running at EL3 (42d4d3b)
check boolean flags are not empty
See: check boolean flags are not empty (1369fb8)
All input and output linker section names have been prefixed with the period character, e.g.
cpu_ops
->.cpu_ops
.See: always prefix section names with
.
(da04341)The
EXTRA_LINKERFILE
build system variable has been replaced with the<IMAGE>_LINKER_SCRIPT_SOURCES
variable. See the commit message for more information.See: permit multiple linker scripts (a6ff006)
The
LINKERFILE
,BL_LINKERFILE
and<IMAGE_LINKERFILE>
build system variables have been renamed. See the commit message for more information.See: clarify linker script generation (8227493)
13.3.2. Resolved Issues
Architecture
CPU feature / ID register handling in general
Memory Partitioning and Monitoring (MPAM) Extension (FEAT_MPAM)
Pointer Authentication Extension
make pauth_helpers linking generic (90ce8b8)
Performance Monitors Extension (FEAT_PMUv3)
Scalable Matrix Extension (FEAT_SME, FEAT_SME2)
disable SME for SPD=spmd (2fd2fce)
Statistical profiling Extension (FEAT_SPE)
drop SPE EL2 context switch code (16e3ddb)
Platforms
Allwinner
check RSB availability in DT on H6 (658b315)
Arm
arm_rotpk_header undefined reference (95302e4)
A5DS
add default value for ARM_DISABLE_TRUSTED_WDOG (115ab63)
CSS
fix invalid redistributor poweroff (60719e4)
FPGA
include missing header file (b7253a1)
FVP
Morello
add platform-specific power domain functions (02a5bcb)
N1SDP
add platform-specific power domain functions (5bdafc4)
RD
RD-N1 Edge
change variable type to fix gcc sign conversion error (3a3e0e5)
TC
increase TC_TZC_DRAM1_SIZE (7e3f6a8)
change the FIP offset to 8 KiB boundary (d07b8aa)
change the properties of optee reserved memory (2fff46c)
enable dynamic feature detection of FEAT_SVE for NormalWorld (67265f2)
enable the execution of both platform tests (657b90e)
only suspend booting after running plat tests (9b26655)
unify TC ROM start addresses (f9e11c7)
update the name of mbedtls config header (d5fc899)
Broadcom
add braces around bodies of conditionals (9f58bfb)
Intel
add mailbox error return status for FCS_DECRYPTION (76ed322)
agilex bitstream pre-authenticate (4b3d323)
fix Agilex and N5X clock manager to main PLL C0 (5f06bff)
fix fcs_client crashed when increased param size (c42402c)
fix pinmux handoff bug on Agilex (e6c0389)
fix print out ERROR when encounter SEU_Err (1a0bf6e)
fix sp_timer0 is not disabled in firewall on Agilex (8de7167)
fix the pointer of block memory to fill in and bytes being set (afe9fcc)
flash dcache before mmio read (731622f)
mailbox store QSPI ref clk in scratch reg (7f9e9e4)
missing NCORE CCU snoop filter fix in BL2 (b34a48c)
remove checking on TEMP and VOLT checking for HWMON (68ac5fe)
update boot scratch to indicate to Uboot is PSCI ON (7f7a16a)
NVIDIA
NXP
i.MX
i.MX 8M
add ddr4 dvfs sw workaround for ERR050712 (e00fe11)
backup mr12/14 value from lpddr4 chip (a2655f4)
correct the rank info get fro mstr (5277c09)
fix coverity out of bound access issue (0331b1c)
fix the current fsp init (25c4323)
fix the dfiphymaster setting after dvfs (ad0cbbf)
fix the dram retention random hang on some imx8mq Rev2.0 (4bf5019)
fix the rank to rank space issue (3330084)
i.MX 8Q
fix compilation with gcc >= 12.x (e75a3b6)
Layerscape
QEMU
QTI
Raspberry Pi
Raspberry Pi 3
initialize SD card host controller (bd96d53)
Renesas
align incompatible function pointers (90c4b3b)
Rockchip
use semicolon instead of comma (8557d49)
ST
add U suffix for unsigned numbers (9c1aa12)
explicitly check operators precedence (56048fe)
include utils.h to solve compilation error (377846b)
make metadata_block_spec static (d1d8a9b)
rework secure-status check in fdt_get_status() (0ebaf22)
use Boolean type for tests (45d2d49)
use indices when counting GPIOs in DT (e7d7544)
STM32MP1
Texas Instruments
Xilinx
fix misra defects (964e559)
handle CRC failure in IPI (5e92be5)
handle CRC failure in IPI callback (6173d91)
initialize values to device enum members (5c62d59)
remove asserts around arg0/arg1 (8be2044)
remove unnecessary condition (c984123)
remove unused mailbox macros (15f49cb)
resolve integer handling issue (4e46db4)
use lib/smccc.h macros instead of trusty spd (0ee07d7)
Versal
check smc_fid 23:16 bits (4a50363)
fix incorrect regbase for PMC IPI (c4185d5)
initialize the variable with value 0 in pm code (cd73d62)
print proper atf handoff source (0fe002c)
replace FPD_MAINCCI* macros (245d30e)
sync location based on IPI_ID macros (92a43bd)
Versal NET
fix irq for IPI0 (95bbfbc)
clear power down bit during wakeup (5f0f7e4)
clear power down interrupt status before enable (2d056db)
correct aff level for cpu off (6ada9dc)
disable wakeup interrupt during client wakeup (e663f09)
enable wake interrupt during client suspend (39fffe5)
fix setting power down state (1f79bdf)
populate gic v3 rdist data statically (355dc3d)
resolve misra 10.6 warnings (8c23775)
resolve misra rule 20.7 warnings (21d1966)
use spin_lock instead of bakery_lock (0b3a2cf)
ZynqMP
add bitmask for get_op_char API (ad4b667)
check return status of pm_get_api_version (c92ad36)
check smc_fid 23:16 bits (09b342a)
conditional reservation of memory in DTB (c52a142)
enable A53 workaround(errata 1530924) (d8133d7)
fix bl31_zynqmp_setup.c coding style (26ef5c2)
fix DT reserved allocated size (2c03915)
fix xck24 silicon ID (f156590)
initialize uint32 with value 0U in pm code (e65584a)
move EM SMC range to SIP range (acbae39)
panic w/o handoff structure in !JTAG (fbe4dbe)
remove redundant api_version check (d0b58c8)
remove unused PLAT_NUM_POWER_DOMAINS (72c3124)
separate EM from PM SMCs (a911396)
update MAX_XLAT_TABLES for DDR memory range (12446ce)
update the conflicting EEMI API IDs (bcc1348)
with DEBUG=1 move bl31 to DDR range (2537f07)
Bootloader Images
Services
RME
SPM
Libraries
CPU Support
do not put RAS check before using esb (9ec2ca2)
use hint instruction for “tsb csync” (7a181b7)
workaround for Cortex-A510 erratum 2684597 (aea4ccf)
workaround for Cortex-A710 erratum 2282622 (89d85ad)
workaround for Cortex-A710 erratum 2768515 (b87b02c)
workaround for Cortex-A78 erratum 2742426 (a63332c)
workaround for Cortex-A78 erratum 2772019 (b10afcc)
workaround for Cortex-A78 erratum 2779479 (7d1700c)
workaround for Cortex-A78C erratum 1827430 (672eb21)
workaround for Cortex-A78C erratum 1827440 (b01a59e)
workaround for Cortex-A78C erratum 2772121 (00230e3)
workaround for Cortex-A78C erratum 2779484 (66bf3ba)
workaround for Cortex-X2 erratum 2282622 (f9c6301)
workaround for Cortex-X2 erratum 2768515 (1cfde82)
workaround for Cortex-X3 erratum 2615812 (c7e698c)
workaround for Neoverse N2 erratum 2743089 (1ee7c82)
workaround for Neoverse V1 errata 2743233 (f1c3eae)
workaround for Neoverse V1 errata 2779461 (2757da0)
workaround for Neoverse V1 erratum 2743093 (31747f0)
workaround platforms non-arm interconnect (ab062f0)
EL3 Runtime
FCONF
OP-TEE
PSCI
GPT
fix compilation error for gpt_rme.c (a0d5147)
SMCCC
check smc_fid [23:17] bits (f8a3579)
C Standard Library
Context Management
enable SCXTNUM access (01cf14d)
Drivers
Authentication
avoid out-of-bounds read in auth_nvctr() (abb8f93)
forbid junk after extensions (fd37982)
only accept v3 X.509 certificates (e9e4a2a)
properly validate X.509 extensions (f5c5185)
reject invalid padding in digests (f47547b)
reject junk after certificates (ca34dbc)
reject padding after BIT STRING in signatures (a8c8c5e)
require at least one extension to be present (72460f5)
require bit strings to have no unused bits (8816dbb)
use NULL instead of 0 for pointer check (654b65b)
mbedTLS
fix mbedtls coverity issues (a9edc32)
Console
I/O
compare function pointers with NULL (06d223c)
MMC
GUID Partition Tables Support
SCMI
UFS
Arm
Ethos-N
add workaround for erratum 2838783 (5a89947)
GIC
RSS
NXP
ST
Style
correct some typos (1b491ee)
Miscellaneous
AArch64
allow build with ARM_ARCH_MINOR=4 (78f56ee)
FDT Wrappers
use correct prototypes (e0c56fd)
FDTs
PIE
pass
-fpie
to the preprocessor as well (966660e)
UUID
add missing
#include
directives (12562af)
add missing click dependency (ff12683)
add parenthesis for tests in MIN, MAX and CLAMP macros (8406db1)
increase BL32 limit (c2a7612)
remove old-style declarations (f4b8470)
remove useless “return” at void functions (af4d8c6)
unify fallthrough annotations (e138400)
Documentation
add a build.tools.python entry (4052d95)
add few missed links for Security Advisories (43f3a9c)
add plantuml as a dependency (65982a9)
add readthedocs configuration file (8a84776)
deprecate plat_convert_pk() in v2.9 (e0f58c7)
make required compiler version == rather than >= (415195c)
python version must be string (3aa919e)
specify python version to 3.10 (a7773c5)
Build System
Tools
Dependencies
add missing aeabi_memset.S (bdedee5)
13.3.3. New Features
Architecture
Extended Translation Control Register (FEAT_TCR2).
CPU feature / ID register handling in general
Guarded Control Stack (FEAT_GCS)
support guarded control stack (688ab57)
Support for the
HCRX_EL2
register (FEAT_HCX)initialize HCRX_EL2 to its default value (ddb615b)
Scalable Matrix Extension (FEAT_SME, FEAT_SME2)
enable SME2 functionality for NS world (03d3c0d)
Platforms
Allwinner
Arm
add ARM_ROTPK_LOCATION variant full key (5f89928)
carveout DRAM1 area for Event Log (6b2e961)
FVP
add Event Log maximum size property in DT (1cf3e2f)
copy the Event Log to TZC secured DRAM area (191aa5d)
define ns memory in the SPMC manifest (7f28179)
emulate trapped RNDR (1ae7552)
enable errata management interface (d3bed15)
enable FEAT_FGT by default (15107da)
enable FEAT_HCX by default (2e12418)
enable support for PSCI OS-initiated mode (e75cc24)
increase BL1_RW and BL2 size (dbb9c1f)
introduce PLATFORM_TEST_EA_FFH config (fe38cc6)
introduce PLATFORM_TEST_RAS_FFH config (5602ce1)
update device tree with load addresses of TOS_FW config (1779762)
Juno
support ARM_IO_IN_DTB option for Juno (2fad320)
Morello
RD
RD-N2
add platform id value for rdn2 variant 3 (028c619)
TC
Intel
MediaTek
add APU init flow (5243091)
add new features of LPM (917abdd)
add SiP service for OP-TEE (621eaab)
add SMC handler for EMI MPU (c842cc0)
add SPM’s SSPM notifier (c234ad1)
MT8188
add apu power on/off control (8e38b92)
add MT8188 SPM debug logs (f85b34b)
add MT8188 SPM support (45d5075)
add SPM feature support (f299efb)
add the register definitions accessed by SPM (1a64689)
enable SPM and LPM (380f64b)
keep infra and peri on when system suspend (e56a939)
update INFRA IOMMU enable flow (98415e1)
MT8195
add support for SMC from OP-TEE (ccc61e1)
NVIDIA
Tegra
implement ‘pwr_domain_off_early’ handler (96d07af)
NXP
i.MX
i.MX 8M
add more dram pll setting (4234b90)
fix the ddr4 dvfs random hang on imx8m (093888c)
update the ddr4 dvfs flow to include ddr3l support (0e39488)
use non-fast wakeup stop mode for system suspend (ef4e5f0)
i.MX 8Q
add anamix pll override setting for DSM mode (387a1df)
add BL31 PIE support (8cfa94b)
add the dram retention support for imx8mq (dd108c3)
add version for B2 (99475c5)
add workaround code for ERR11171 on imx8mq (88a2646)
always set up console (36be108)
correct the slot ack setting for STOP mode (724ac3e)
enable dram dvfs support on imx8mq (8962bdd)
make IMX_BOOT_UART_BASE configurable via build parameter (202737e)
remove empty bl31_plat_runtime_setup (7698dba)
i.MX 8
add support for debug uart on lpuart1 (8406447)
Layerscape
QEMU
add “neoverse-n1” cpu support (226f4c8)
add A76/N1 cpu support for virt (6b66693)
combine TF-A artefacts into ROM file (63bb905)
increase max cpus per cluster to 16 (73a7aca)
increase size of bl2 (db2bf3a)
make coherent memory section optional (af994ae)
support el3 spmc (302f053)
support pointer authentication (cffc956)
support s-el2 spmc (36802e2)
update abi between spmd and spmc (25ae7ad)
QTI
ST
Texas Instruments
add PSCI system_off support (0bdef26)
add sub and patch version number support (852378f)
disable L2 dataless UniqueClean evictions (10d5cf1)
do not handle EAs in EL3 (2fcd408)
set L2 cache data ram latency on A72 cores to 4 cycles (aee2f33)
set L2 cache ECC and and parity on A72 cores (81858a3)
set snoop-delayed exclusive handling on A72 cores (5668db7)
synchronize access to secure proxy threads (312eec3)
Xilinx
Services
RME
SPM
EL3 SPMC
make platform logical partition optional (555677f)
SPMD
add support for FFA_EL3_INTR_HANDLE_32 ABI (6671b3d)
copy tos_fw_config in secure region (0cea2ae)
fail safe if SPM fails to initialize (0d33649)
introduce FFA_PARTITION_INFO_GET_REGS (eaaf517)
introduce platform handler for Group0 interrupt (f0b64e5)
map SPMC manifest region as EL3_PAS (8c829a9)
register handler for group0 interrupt from NWd (a1e0e87)
ERRATA_ABI
errata management firmware interface (ffea384)
Libraries
CPU Support
EL3 Runtime
FCONF
rename ‘ns-load-address’ to ‘secondary-load-address’ (05e5503)
OP-TEE
PSCI
C Standard Library
PSA
Drivers
Authentication
UFS
adds timeout and error handling (2c5bce3)
Arm
Ethos-N
add check for NPU in SiP setup (a2cdbb1)
add event and aux control support (7820777)
add multiple asset allocators (8a921e3)
add NPU firmware validation (313b776)
add NPU sleeping SMC call (2a2e3e8)
add NPU support in fiptool (c91b08c)
add protected NPU firmware setup (6dcf3e7)
add protected NPU TZMP1 regions (d77c11e)
add reserved memory address support (a19a024)
add reset type to reset SMC calls (fa37d30)
add separate RO and RW NSAIDs (986c4e9)
add SMC call to get FW properties (e9812dd)
add stream extends and attr support (e64abe7)
add support for NPU to cert_create (f309607)
add support to set up NSAID (70a296e)
load NPU firmware at BL2 (33bcaed)
GIC
GICv3
enlarge the range for intr_num of structure interrupt_prop_t (d5eee8f)
RSS
add TC platform UUIDs for RSS images (6ef63af)
SBSA
helper api for refreshing watchdog timer (e8166d3)
Miscellaneous
Documentation
allow verbose build (f771a34)
Build System
Tools
Firmware Image Package Tool
handle FIP in a disk partition (06e69f7)
Dependencies
Compiler runtime libraries
update source files (658ce7a)
13.4. 2.8.0 (2022-11-15)
13.4.1. ⚠ BREAKING CHANGES
Drivers
Arm
Ethos-N
add support for SMMU streams
See: add support for SMMU streams (b139f1c)
13.4.2. New Features
Architecture
pass SMCCCv1.3 SVE hint bit to dispatchers (0fe7b9f)
Branch Record Buffer Extension (FEAT_BRBE)
add brbe under feature detection mechanism (1298f2f)
Confidential Compute Architecture (CCA)
introduce new “cca” chain of trust (56b741d)
Pointer Authentication Extension
add/modify helpers to support QARMA3 (9ff5f75)
Trapping support for RNDR/RNDRRS (FEAT_RNG_TRAP)
add EL3 support for FEAT_RNG_TRAP (ff86e0b)
Scalable Matrix Extension (FEAT_SME)
fall back to SVE if SME is not there (26a3351)
Scalable Vector Extension (FEAT_SVE)
support full SVE vector length (bebcf27)
Trace Buffer Extension (FEAT_TRBE)
add trbe under feature detection mechanism (47c681b)
Platforms
Arm
add support for cca CoT (f242379)
forbid running RME-enlightened BL31 from DRAM (1164a59)
provide some swd rotpk files (98662a7)
retrieve the right ROTPK for cca (50b4497)
CSS
FVP
add example manifest for TSP (3cf080e)
add crypto support in BL31 (c9bd1ba)
add plat API to set and get the DRTM error (586f60c)
add plat API to validate that passed region is non-secure (d5f225d)
add platform hooks for DRTM DMA protection (d72c486)
build delegated attestation in BL31 (0271edd)
dts: drop 32-bit .dts files (b920330)
fdts: update rtsm_ve DT files from the Linux kernel (2716bd3)
increase BL31’s stack size for DRTM support (44df105)
increase MAX_XLAT_TABLES entries for DRTM support (8a8dace)
support building RSS comms driver (29e6fc5)
RD
SGI
increase memory reserved for bl31 image (a62cc91)
read isolated cpu mpid list from sds (4243ef4)
add page table translation entry for secure uart (2a7e080)
bump bl1 rw size (94df8da)
configure SRAM and BL31 size for sgi platform (8fd820f)
deviate from arm css common uart related definitions (173674a)
enable css implementation of warm reset (18884c0)
remove override for
ARM_BL31_IN_DRAM
build-option (a371327)route TF-A logs via secure uart (0601083)
TC
add MHU addresses for AP-RSS comms on TC2 (6299c3a)
add RSS-AP message size macro (445130b)
add RTC PL031 device tree node (a816de5)
enable RSS backend based measured boot (6cb5d32)
increase maximum BL1/BL2/BL31 sizes (e6c1316)
introduce TC2 platform (eebd2c3)
move start address for BL1 to 0x1000 (9335c28)
HiSilicon
HiKey960
add a FF-A logical partition (25a357f)
add memory sharing hooks for SPMC_AT_EL3 (5f905a2)
add plat-defines for SPMC_AT_EL3 (feebd4c)
add SP manifest for SPMC_AT_EL3 (6971642)
define a datastore for SPMC_AT_EL3 (e618c62)
increase secure workspace to 64MB (e0eea33)
read serial number from UFS (c371b83)
upgrade to xlat_tables_v2 (6cfc807)
MediaTek
add more flexibility of mtk_pm.c (6ca2046)
add more options for build helper (5b95e43)
add smcc call for MSDC (4dbe24c)
extend SiP vendor subscription events (99d30b7)
implement generic platform port (394b920)
introduce mtk init framework (52035de)
move dp drivers to common folder (d150b62)
move lpm drivers back to common (cd7890d)
move mtk_cirq.c drivers to cirq folder (cc76896)
support coreboot BL31 loading (ef988ae)
MT8186
add EMI MPU support for SCP and DSP (3d4b6f9)
MT8188
add armv8.2 support (45711e4)
add audio support (c70f567)
add cpu_pm driver (4fe7e6a)
add DCM driver (bc9410e)
add DFD control in SiP service (7079a94)
add display port control in SiP service (a4e5023)
add EMI MPU basic drivers (8454f0d)
add IOMMU enable control in SiP service (be45724)
add LPM driver support (f604e4e)
add MCUSYS support (4cc1ff7)
add pinctrl support (ec4cfb9)
add pmic and pwrap support (e9310c3)
add reset and poweroff functions (a72b9e7)
add RTC support (af5d8e0)
add support for PTP3 (44a1051)
apply ERRATA for CA-78 (abb995a)
enable MTK_PUBEVENT_ENABLE (0b1186a)
initialize GIC (cfb0516)
initialize platform for MediaTek MT8188 (de310e1)
initialize systimer (215869c)
NXP
i.MX
i.MX 8M
add dram retention flow for imx8m family (c71793c)
add support for high assurance boot (720e7b6)
add the anamix pll override setting (66d399e)
add the ddr frequency change support for imx8m family (9c336f6)
add the PU power domain support on imx8mm/mn (44dea54)
keep pu domains in default state during boot stage (9d3249d)
make psci common code pie compatible (5d2d332)
i.MX 8M Nano
i.MX 8M Mini
i.MX 8M Plus
i.MX 8Q
add 100us delay after USB OTG SRC bit 0 clear (66345b8)
Layerscape
LS1043A
LS1043ARDB
update ddr configure for ls1043ardb-pd (18af644)
QEMU
increase size of bl31 (0e6977e)
QTI
Socionext
ST
add trace for early console (00606df)
enable MMC_FLAG_SD_CMD6 for SD-cards (53d5b8f)
properly manage early console (5223d88)
search pinctrl node by compatible (b14d3e2)
STM32MP1
add a check on TRUSTED_BOARD_BOOT with secure chip (54007c3)
add a stm32mp crypto library (ad3e46a)
add define for external scratch buffer for nand devices (9ee2510)
add early console in SP_min (14a0704)
add plat_report_*_abort functions (0423868)
add RNG initialization in BL2 for STM32MP13 (2742374)
add the decryption support (cd79116)
add the platform specific build for tools (461d631)
add the TRUSTED_BOARD_BOOT support (beb625f)
allow to override MTD base offset (e0bbc19)
configure the serial boot load address (4b2f23e)
extend STM32MP_EMMC_BOOT support to FIP format (95e4908)
manage second NAND OTP on STM32MP13 (d3434dc)
manage STM32MP13 rev.Y (a3f97f6)
optionally use paged OP-TEE (c4dbcb8)
remove unused function from boot API (f30034a)
retrieve FIP partition by type UUID (1dab28f)
save boot auth status and partition info (ab2b325)
update ROM code API for header v2 management (89c0774)
STM32MP13
change BL33 memory mapping (10f6dc7)
STM32MP15
manage OP-TEE shared memory (722ca35)
Texas Instruments
K3
add support for J784S4 SoCs (4a566b2)
Xilinx
Bootloader Images
Services
add a SPD for ProvenCore (b0980e5)
RME
SPM
DRTM
add a few DRTM DMA protection APIs (2b13a98)
add DRTM parameters structure version check (c503ded)
add Event Log driver support for DRTM (4081426)
add PCR entries for DRTM (ff1e42e)
add platform functions for DRTM (2a1cdee)
add remediation driver support in DRTM (1436e37)
add standard DRTM service (e62748e)
check drtm arguments during dynamic launch (40e1fad)
ensure that no SDEI event registered during dynamic launch (b1392f4)
ensure that passed region lies within Non-Secure region of DRAM (764aa95)
flush dcache before DLME launch (67471e7)
introduce drtm dynamic launch function (bd6cc0b)
invalidate icache before DLME launch (2c26597)
prepare DLME data for DLME launch (d42119c)
prepare EL state during dynamic launch (d1747e1)
retrieve DRTM features (e9467af)
take DRTM components measurements before DLME launch (2090e55)
update drtm setup function (d54792b)
Libraries
Drivers
Miscellaneous
Tools
Dependencies
13.4.3. Resolved Issues
Architecture
Platforms
Arm
FVP
FVP Versatile Express
fdts: Fix vexpress,config-bus subnode names (60da130)
Morello
dts: add model names (30df890)
dts: fix DP SMMU IRQ ordering (fba729b)
dts: fix DT node naming (41c310b)
dts: fix GICv3 compatible string (982f258)
dts: fix SCMI shmem/mboxes grouping (8aeb1fc)
dts: fix SMMU IRQ ordering (5016ee4)
dts: fix stdout-path target (67a8a5c)
dts: remove #a-c and #s-c from memory node (f33e113)
dts: use documented DPU compatible string (3169572)
move BL31 to run from DRAM space (05330a4)
N1SDP
TC
Intel
MediaTek
NXP
QEMU
enable SVE and SME (337ff4f)
QTI
adding secure rm flag (b5959ab)
Raspberry Pi
Raspberry Pi 3
tighten platform pwr_domain_pwr_down_wfi behaviour (028c4e4)
Renesas
R-Car
R-Car 3
fix RPC-IF device node name (08ae247)
Rockchip
Socionext
Synquacer
increase size of BL33 (a12a66d)
ST
Xilinx
include missing header (28ba140)
miscellaneous fixes for xilinx platforms (bfc514f)
remove unnecessary header include (0ee2dc1)
update define for ZynqMP specific functions (24b5b53)
Versal
add SGI register call version check (5897e13)
enable a72 erratum 859971 and 1319367 (769446a)
fix code indentation issues (72583f9)
fix macro coding style issues (80806aa)
fix Misra-C violations in bl31_setup and pm_svc_main (68ffcd1)
remove clock related macros (47f8145)
resolve misra 10.1 warnings (19f92c4)
resolve misra 15.6 warnings (1117a16)
resolve misra 8.13 warnings (3d2ebe7)
resolve the misra 4.6 warnings (f7c48d9)
resolve the misra 4.6 warnings (912b7a6)
route GIC IPI interrupts during setup (04cc91b)
use only one space for indentation (dee5885)
Versal NET
ZynqMP
fix coverity scan warnings (1ac6af1)
ensure memory write finish with dsb() (ac6c135)
fix for incorrect afi write mask value (4264bd3)
move bl31 with DEBUG=1 back to OCM (389594d)
move debug bl31 based address back to OCM (0ba3d7a)
remove additional 0x in %p print (05a6107)
resolve misra 4.6 warnings (cdb6211)
resolve misra 8.13 warnings (8695ffc)
resolve MISRA-C:2012 R.10.1 warnings (c889088)
resolve the misra 4.6 warnings (15dc3e4)
resolve the misra 4.6 warnings (ffa9103)
resolve the misra 8.6 warnings (7b1a6a0)
Bootloader Images
Services
RME
SPM
EL3 SPMC
check descriptor size for overflow (eed15e4)
compute full FF-A V1.1 desc size (be075c3)
deadlock when relinquishing memory (ac568b2)
error handling in allocation (cee8bb3)
fix detection of overlapping memory regions (0dc3518)
fix incomplete reclaim validation (c4adbe6)
fix location of fragment length check (21ed9ea)
fix relinquish validation check (b4c3621)
Libraries
CPU Support
fix cpu version check for Neoverse N2, V1 (03ebf40)
workaround for Cortex-A510 erratum 2666669 (afb5d06)
workaround for Cortex-A710 2216384 (b781fcf)
workaround for Cortex-A710 erratum 2291219 (888eafa)
workaround for Cortex-A76 erratum 2743102 (4927309)
workaround for Cortex-A77 erratum 2743100 (4fdeaff)
workaround for Cortex-A78C erratum 2376749 (5d3c1f5)
workaround for Cortex-X3 erratum 2313909 (7954412)
workaround for Neoverse N1 erratum 2743102 (8ce4050)
workaround for Neoverse-N2 erratum 2326639 (43438ad)
workaround for Neoverse-N2 erratum 2388450 (884d515)
workaround for Cortex A78C erratum 2242638 (6979f47)
workaround for Cortex-A510 erratum 2347730 (11d448c)
workaround for Cortex-A510 erratum 2371937 (a67c1b1)
workaround for Cortex-A710 erratum 2147715 (3280e5e)
workaround for Cortex-A710 erratum 2371105 (3220f05)
workaround for Cortex-A77 erratum 2356587 (7bf1a7a)
workaround for Cortex-A78C 2132064 (8008bab)
workaround for Cortex-A78C erratum 2395411 (4b6f002)
workaround for Cortex-X2 erratum 2371105 (bc0f84d)
workaround for Neoverse-N2 erratum 2376738 (e6602d4)
workaround for Neoverse-V1 erratum 1618635 (14a6fed)
workaround for Neoverse-V1 erratum 2294912 (39eb5dd)
workaround for Neoverse-V1 erratum 2372203 (57b73d5)
EL3 Runtime
FCONF
fix type error displaying disable_auth (381f465)
PSCI
fix MISRA failure - Memory - illegal accesses (0551aac)
GPT
correct the GPC enable sequence (14cddd7)
C Standard Library
pri*ptr macros for aarch64 (d307229)
PSA
Context Management
remove explicit ICC_SRE_EL2 register read (2b28727)
Semihosting
fix seek call failure check (7c49438)
Drivers
Miscellaneous
Documentation
Build System
Tools
Dependencies
add missing aeabi_memcpy.S (93cec69)
13.5. 2.7.0 (2022-05-20)
13.5.1. New Features
Architecture
Platforms
add SZ_* macros (1af59c4)
Allwinner
Arm
FVP
Morello
add changes to enable TBBR boot (4af5397)
add DTS for Morello SoC platform (572c8ce)
add support for nt_fw_config (6ad6465)
add TARGET_PLATFORM flag (8840711)
configure DMC-Bing mode (9b8c431)
expose scmi protocols in fdts (87639aa)
split platform_info sds struct (4a7a9da)
zero out the DDR memory space (2d39b39)
N1SDP
RD
SGI
TC
Corstone-1000
Intel
add macro to switch between different UART PORT (447e699)
add RSU ‘Max Retry’ SiP SMC services (4c26957)
add SiP service for DCMF status (984e236)
add SMC for enquiring firmware version (c34b2a7)
add SMC support for Get USERCODE (93a5b97)
add SMC support for HWMON voltage and temp sensor (52cf9c2)
add SMC support for ROM Patch SHA384 mailbox (77902fc)
add SMC/PSCI services for DCMF version support (44eb782)
add SMPLSEL and DRVSEL setup for Stratix 10 MMC (bb0fcc7)
add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge (11f4f03)
allow to access all register addresses if DEBUG=1 (7e954df)
create source file for firewall configuration (afa0b1a)
enable firewall for OCRAM in BL31 (ae19fef)
enable SMC SoC FPGA bridges enable/disable (b7f3044)
extend attestation service to Agilex family (581182c)
implement timer init divider via cpu frequency. (#1) (f65bdf3)
initial commit for attestation service (d174083)
single certificate feature enablement (7facace)
support AES Crypt Service (6726390)
support crypto service key operation (342a061)
support crypto service session (6dc00c2)
support ECDH request (4944686)
support ECDSA Get Public Key (d2fee94)
support ECDSA HASH Signing (6925410)
support ECDSA HASH Verification (7e25eb8)
support ECDSA SHA-2 Data Signature Verification (5830506)
support ECDSA SHA-2 Data Signing (07912da)
support extended random number generation (24f9dc8)
support HMAC SHA-2 MAC verify request (c05ea29)
support session based SDOS encrypt and decrypt (537ff05)
support SHA-2 hash digest generation on a blob (7e8249a)
support SiP SVC version (f0c40b8)
support version 2 SiP SVC SMC function ID for mailbox commands (c436707)
support version 2 SiP SVC SMC function ID for non-mailbox commands (ad47f14)
update to support maximum response data size (b703fac)
Marvell
Armada
A3K
add north and south bridge reset registers (a4d35ff)
MediaTek
introduce mtk makefile (500d40d)
MT8195
MT8186
add DFD control in SiP service (e46e9df)
add SPM suspend driver (7ac6a76)
add Vcore DVFS driver (635e6b1)
disable 26MHz clock while suspending (9457cec)
initialize platform for MediaTek MT8186 (27132f1)
add power-off function for PSCI (a68346a)
add CPU hotplug (1da57e5)
add DCM driver (95ea87f)
add EMI MPU basic driver (1b17e34)
add MCDI drivers (06cb65e)
add pinctrl support (af5a0c4)
add pwrap and pmic driver (5bc88ec)
add reboot function for PSCI (24dd5a7)
add RTC drivers (6e5d76b)
add SiP service (5aab27d)
add sys_cirq support (109b91e)
apply erratas for MT8186 (572f8ad)
initialize delay_timer (d73e15e)
initialize GIC (206f125)
initialize systimer (a6a0af5)
NXP
add SoC erratum a008850 (3d14a30)
add ifc nor and nand as io devices (b759727)
add RCPM2 registers definition (d374060)
add CORTEX A53 helper functions (3ccc8ac)
i.MX
i.MX 8M
add a simple csu driver for imx8m family (71c40d3)
add imx csu/rdc enum type defines for imx8m (0c6dfc4)
enable conditional build for SDEI (d2a339d)
enable the coram_s tz by default on imx8mn/mp (d5ede92)
enable the csu init on imx8m (0a76495)
do not release JR0 to NS if HAB is using it (77850c9)
switch to xlat_tables_v2 (4f8d5b0)
i.MX 8M Mini
i.MX 8M Plus
i.MX 8M Nano
i.MX 8M Q
Layerscape
add CHASSIS 3 support for tbbr (9550ce9)
add new soc errata a009660 support (785ee93)
add new soc errata a010539 support (85bd092)
add soc helper macro definition for chassis 3 (602cf53)
define more chassis 3 hardware address (0d396d6)
print DDR errata information (3412716)
LS1043A
LX2
enable DDR erratas for lx2 platforms (cd960f5)
LS1046A
LS1088A
QEMU
QTI
Renesas
ST
add a function to configure console (53612f7)
add STM32CubeProgrammer support on UART (fb3e798)
add STM32MP_UART_PROGRAMMER target (9083fa1)
add early console in BL2 (c768b2b)
disable authentication based on part_number (49abdfd)
get pin_count from the gpio-ranges property (d0f2cf3)
map 2MB for ROM code (1697ad8)
protect UART during platform init (acf28c2)
update stm32image tool for header v2 (2d8886a)
update the security based on new compatible (812daf9)
use newly introduced clock framework (33667d2)
ST32MP1
adaptations for STM32MP13 image header (a530874)
add “Boot mode” management for STM32MP13 (296ac80)
add a second fixed regulator (225ce48)
add GUID values for updatable images (8d6b476)
add GUID’s for identifying firmware images to be booted (41bd8b9)
add helper to enable high speed mode in low voltage (dea02f4)
add logic to pass the boot index to the Update Agent (ba02add)
add logic to select the images to be booted (8dd7553)
add NVMEM layout compatibility definition (dfbdbd0)
add part numbers for STM32MP13 (30eea11)
add regulator framework compilation (bba9fde)
add sdmmc compatible in platform define (3331d36)
add sign-compare warning (c10f3a4)
add stm32_get_boot_interface function (a6bfa75)
add support for building the FWU feature (ad216c1)
add support for reading the metadata partition (0ca180f)
add timeout in IO compensation (de02e9b)
allow configuration of DDR AXI ports number (88f4fb8)
call pmic_voltages_init() in platform init (ffd1b88)
chip rev. Z is 0x1001 on STM32MP13 (ef0b8a6)
enable BL2_IN_XIP_MEM to remove relocation sections (d958d10)
enable format-signedness warning (cff26c1)
get CPU info from SYSCFG on STM32MP13 (6512c3a)
introduce new flag for STM32MP13 (bdec516)
manage HSLV on STM32MP13 (fca10a8)
manage monotonic counter (f5a3688)
new way to access platform OTP (ae3ce8b)
preserve the PLL4 settings for USB boot (bf1af15)
register fixed regulator (967a8e6)
remove unsupported features on STM32MP13 (111a384)
retry 3 times FWU trial boot (f87de90)
select platform compilation either by flag or DT (99a5d8d)
skip TOS_FW_CONFIG if not in FIP (b706608)
stm32mp_is_single_core() for STM32MP13 (7b48a9f)
update BACKUP_BOOT_MODE for STM32MP13 (4b031ab)
update boot API for header v2.0 (5f52eb1)
update CFG0 OTP for STM32MP13 (1c37d0c)
update console management for SP_min (aafff04)
update IO compensation on STM32MP13 (8e07ab5)
update IP addresses for STM32MP13 (52ac998)
update memory mapping for STM32MP13 (48ede66)
updates for STM32MP13 device tree compilation (d38eaf9)
usb descriptor update for STM32MP13 (d59b9d5)
use clk_enable/disable functions (c7a66e7)
use only one filter for TZC400 on STM32MP13 (b7d0058)
warn when debug enabled on secure chip (ac4b8b0)
Texas Instruments
Xilinx
Versal
add SPP/EMU platform support for versal (be73459)
add common interfaces to handle EEMI commands (1397967)
add SMCCC call TF_A_PM_REGISTER_SGI (fcf6f46)
add support to reset SGI (bf70449)
add UART1 as console (2c79149)
enhance PM_IOCTL EEMI API to support additional arg (d34a5db)
get version for ATF related EEMI APIs (da6e654)
remove the time stamp configuration (18e2a79)
ZynqMP
disable the -mbranch-protection flag (67abd47)
fix section
coherent_ram' will not fit in region
RAM’ (9b4ed0a)add feature check support (223a628)
add support to get info of xilfpga (cc077c2)
add uart1 as console (ea66e4a)
increase the max xlat tables when debug build is enabled (4c4b961)
pass ioctl calls to firmware (76ff8c4)
pm_api_clock_get_num_clocks cleanup (e682d38)
Bootloader Images
Services
RME
SPM
update ff-a boot protocol documentation (573ac37)
EL3 SPMC
allow BL32 specific defines to be used by SPMC_AT_EL3 (2d65ea1)
add plat hook for memory transactions (a8be4cd)
add EL3 SPMC #defines (44639ab)
introduce accessor function to obtain datastore (6a0788b)
add FF-A secure partition manager core (5096aeb)
add FFA_FEATURES handler (55a2963)
add FFA_PARTITION_INFO_GET handler (f74e277)
add FFA_RUN handler (aad20c8)
add FFA_RX_RELEASE handler (f0c25a0)
add function to determine the return path from the SPMC (20fae0a)
add helper function to obtain endpoint mailbox (f16b6ee)
add helper function to obtain hyp structure (a7c0050)
add helper to obtain a partitions FF-A version (c2b1434)
add partition mailbox structs (e1df600)
add support for direct req/resp (9741327)
add support for FF-A power mgmt. messages in the EL3 SPMC (59bd2ad)
add support for FFA_MSG_WAIT (c4db76f)
add support for FFA_SPM_ID_GET (46872e0)
add support for forwarding a secure interrupt to the SP (729d779)
add support for handling FFA_ERROR ABI (d663fe7)
add support for v1.1 FF-A boot protocol (2e21921)
add support for v1.1 FF-A memory data structures (7e804f9)
enable building of the SPMC at EL3 (1d63ae4)
enable checking of execution ctx count (5b0219d)
enable handling FF-A RX/TX Mapping ABIs (1a75224)
enable handling FFA_VERSION ABI (0c7707f)
enable handling of the NS bit (0560b53)
enable parsing of messaging methods from manifest (3de378f)
enable parsing of UUID from SP Manifest (857f579)
enable the SPMC to pass the linear core ID in a register (f014300)
prevent read only xlat tables with the EL3 SPMC (70d986d)
support FFA_ID_GET ABI (d5fe923)
allow forwarding of FFA_FRAG_RX/TX calls (642db98)
enable handling of FF-A SMCs with the SPMC at EL3 (bb01a67)
update SPMC init flow to use EL3 implementation (6da7607)
add logical partition framework (7affa25)
add FF-A memory management code (e0b1a6d)
prevent duplicated sharing of memory regions (fef85e1)
support multiple endpoints in memory transactions (f0244e5)
SPMD
SPM MM
add support to save and restore fp regs (15dd6f1)
Libraries
CPU Support
EL3 Runtime
FCONF
Standard C Library
add support for length specifiers (701e94b)
PSA
Drivers
Generic Clock
add a minimal clock framework (847c6bc)
FWU
Measured Boot
add RSS backend (0442ebd)
GUID Partition Tables Support
Arm
Marvell
Armada
A3K
A3720
preserve x1/x2 regs in console_a3700_core_init() (7c85a75)
MediaTek
NXP
ST
Miscellaneous
Documentation
Tools
13.5.2. Resolved Issues
Architecture
Activity Monitors Extension (FEAT_AMU)
Scalable Vector Extension (FEAT_SVE)
disable ENABLE_SVE_FOR_NS for AARCH32 (24ab2c0)
Platforms
Allwinner
improve DTB patching error handling (79808f1)
Arm
fix fvp and juno build with USE_ROMLIB option (861250c)
increase ARM_BL_REGIONS count (dcb1959)
remove reclamation of functions starting with “init” (6c87abd)
use PLAT instead of TARGET_PLATFORM (c5f3de8)
fix SP count limit without dual root CoT (9ce15fe)
FVP
Morello
SGI
disable SVE for NS to support SPM_MM builds (78d7e81)
TC
remove the bootargs node (68fe3ce)
Corstone-1000
change base address of FIP in the flash (1559450)
Broadcom
Intel
add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD (ac097fd)
allow non-secure access to FPGA Crypto Services (FCS) (4837a64)
always set doorbell to SDM after sending command (e93551b)
assert if bl_mem_params is NULL pointer (35fe7f4)
bit-wise configuration flag handling (276a436)
change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD (108514f)
configuration status based on start request (e40910e)
define macros to handle buffer entries (7db1895)
enable HPS QSPI access by default (000267b)
extend SDM command to return the SDM firmware version (c026dfe)
extending to support large file size for AES encryption and decryption (dcb144f)
extending to support large file size for SHA-2 ECDSA data signing and signature verifying (1d97dd7)
extending to support large file size for SHA2/HMAC get digest and verifying (70a7e6a)
fix bit masking issue in intel_secure_reg_update (c9c0709)
fix configuration status based on start request (673afd6)
fix ddr address range checker (12d71ac)
fix ECC Double Bit Error handling (c703d75)
fix fpga config write return mechanism (ef51b09)
flush dcache before sending certificate to mailbox (49d44ec)
get config status OK status (07915a4)
introduce a generic response error code (651841f)
make FPGA memory configurations platform specific (f571183)
modify how configuration type is handled (ec4f28e)
null pointer handling for resp_len (a250c04)
refactor NOC header (bc1a573)
reject non 4-byte align request size for FPGA Crypto Service (FCS) (52ed157)
remove redundant NOC header declarations (58690cd)
remove unused printout (0d19eda)
update certificate mask for FPGA Attestation (fe5637f)
update encryption and decryption command logic (02d3ef3)
use macro as return value (e0fc2d1)
Marvell
Mediatek
NVIDIA
Tegra
Tegra 194
remove incorrect erxctlr assert (e272c61)
NXP
Renesas
Socionext
Synquacer
initialise CNTFRQ in Non Secure CNTBaseN (4d4911d)
ST
add missing header include (b1391b2)
don’t try to read boot partition on SD cards (9492b39)
fix NULL pointer dereference issues (2deff90)
manage UART clock and reset only in BL2 (9e52d45)
remove extra chars from dtc version (03d2077)
ST32MP1
add missing debug.h (356ed96)
correct dtc version check (429f10e)
correct include order (ff7675e)
correct types in messages (43bbdca)
deconfigure UART RX pins (d7176f0)
do not reopen debug features (21cfa45)
fix enum prints (ceab2fc)
include assert.h to fix build failure (570c71b)
remove interrupt_provider warning for dtc (ca88c76)
restrict DEVICE2 mapping in BL2 (db3e0ec)
rework switch/case for MISRA (f7130e8)
set reset pulse duration to 31ms (9a73a56)
Xilinx
fix coding style violations (bb1768c)
fix mismatching function prototype (81333ea)
Versal
resolve misra R10.1 in pm services (775bf1b)
resolve misra R10.3 (b2bb3ef)
resolve misra R10.3 in pm services (5d1c211)
resolve misra R10.6 (93d4625)
resolve misra R10.6 in pm services (fa98d7f)
resolve misra R14.4 (a62c40d)
resolve misra R15.6 (b9fa2d9)
resolve misra R15.6 in pm services (4156719)
resolve misra R15.7 (bc2637e)
resolve misra R16.3 in pm services (27ae531)
resolve misra R17.7 (526a1fd)
resolve misra R20.7 in pm services (5dada62)
resolve misra R7.2 (0623dce)
fix coverity scan warnings (0b15187)
fix the incorrect log message (ea04b3f)
ZynqMP
define and enable ARM_XLAT_TABLES_LIB_V1 (c884c9a)
query node status to power up APU (b35b556)
resolve misra 7.2 warnings (5bcbd2d)
resolve misra 8.3 warnings (944e7ea)
resolve misra R10.3 (2b57da6)
resolve misra R14.4 warnings (dd1fe71)
resolve misra R15.6 warnings (eb0d2b1)
resolve misra R15.7 warnings (16de22d)
resolve misra R16.3 warnings (e7e5d30)
resolve misra R8.4 warnings (610eeac)
update the log message to verbose (1277af9)
use common interface for eemi apis (a469c1e)
Bootloader Images
Services
Libraries
CPU Support
workaround for Cortex-A710 2282622 (ef934cd)
workaround for Cortex-A710 erratum 2267065 (cfe1a8f)
workaround for Cortex A78 AE erratum 2376748 (92e8708)
workaround for Cortex A78 AE erratum 2395408 (3f4d81d)
workaround for Cortex X2 erratum 2002765 (34ee76d)
workaround for Cortex X2 erratum 2058056 (e16045d)
workaround for Cortex X2 erratum 2083908 (1db6cd6)
workaround for Cortex-A510 erratum 1922240 (8343563)
workaround for Cortex-A510 erratum 2041909 (e72bbe4)
workaround for Cortex-A510 erratum 2042739 (d48088a)
workaround for Cortex-A510 erratum 2172148 (c0959d2)
workaround for Cortex-A510 erratum 2218950 (cc79018)
workaround for Cortex-A510 erratum 2250311 (7f304b0)
workaround for Cortex-A510 erratum 2288014 (d5e2512)
workaround for Cortex-A710 erratum 2008768 (af220eb)
workaround for Cortex-A710 erratum 2136059 (8a855bd)
workaround for Cortex-A78 erratum 2376745 (5d796b3)
workaround for Cortex-A78 erratum 2395406 (3b577ed)
workaround for Cortex-X2 errata 2017096 (e7ca443)
workaround for Cortex-X2 errata 2081180 (c060b53)
workaround for Cortex-X2 erratum 2147715 (63446c2)
workaround for Cortex-X2 erratum 2216384 (4dff759)
workaround for DSU-110 erratum 2313941 (7e3273e)
workaround for Rainier erratum 1868343 (a72144f)
workarounds for cortex-x1 errata (7b76c20)
use CPU_NO_EXTRA3_FUNC for all variants (b2ed998)
EL3 Runtime
set unset pstate bits to default (7d33ffe)
Context Management
add barrier before el3 ns exit (0482503)
remove registers accessible only from secure state from EL2 context (7f41bcc)
refactor the cm_setup_context function (2bbad1d)
remove initialization of EL2 registers when EL2 is used (fd5da7a)
add cm_prepare_el3_exit_ns function (8b95e84)
refactor initialization of EL1 context registers (b515f54)
FCONF
correct image_id type in messages (cec2fb2)
PSCI
correct parent_node type in messages (b9338ee)
GPT
rework delegating/undelegating sequence (6a00e9b)
Translation Tables
fix bug on VERBOSE trace (956d76f)
Standard C Library
Locks
add __unused for clang (5a030ce)
Drivers
FWU
rename is_fwu_initialized (aae7c96)
I/O
MTD
correct types in messages (6e86b46)
Measured Boot
add RMM entry to event_log_metadata (f4e3e1e)
MTD
correct types in messages (6e86b46)
SCMI
UFS
delete call to inv_dcache_range for utrd (c5ee858)
disables controller if enabled (b3f03b2)
don’t zero out buf before ufs read (2ef6b8d)
don’t zero out the write buffer (cd3ea90)
fix cache maintenance issues (38a5ecb)
move nutrs assignment to ufs_init (0956319)
read and write attribute based on spec (a475518)
Arm
Marvell
COMPHY
change reg_set() / reg_set16() to update semantics (95c26d6)
Armada 3700
drop MODE_REFDIV constant (9fdecc7)
fix comment about COMPHY status register (4bcfd8c)
fix comments about selector register values (71183ef)
fix Generation Setting registers names (e5a2aac)
fix PIN_PU_IVREF register name (c9f138e)
fix reference clock selection value names (6ba97f8)
fix SerDes frequency register value name (bdcf44f)
use reg_set() according to update semantics (4d01bfe)
Armada
NXP
ST
USB
correct type in message (bd9cd63)
Miscellaneous
AArch64
fix encodings for MPAMVPM* registers (e926558)
FDTs
PIE
Security
apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57 (9b2510b)
loop workaround for CVE-2022-23960 for Cortex-A76 (a10a5cb)
report CVE 2022 23960 missing for aarch32 A57 and A72 (2e5d7a4)
update Cortex-A15 CPU lib files for CVE-2022-23960 (187a617)
workaround for CVE-2022-23960 (c2a1521)
workaround for CVE-2022-23960 (1fe4a9d)
workaround for CVE-2022-23960 for A76AE, A78AE, A78C (5f802c8)
workaround for CVE-2022-23960 for Cortex-A57, Cortex-A72 (be9121f)
workaround for CVE-2022-23960 for Cortex-X1 (e81e999)
Tools
NXP Tools
Firmware Image Package Tool
Secure Partition Tool
Certificate Creation Tool
let distclean Makefile target remove the cert_create tool (e15591a)
Dependencies
commitlint
change scope-case to lower-case (804e52e)
13.6. 2.6.0 (2021-11-22)
13.6.1. ⚠ BREAKING CHANGES
Architecture
Activity Monitors Extension (FEAT_AMU)
The public AMU API has been reduced to enablement only to facilitate refactoring work. These APIs were not previously used.
See: privatize unused AMU APIs (b4b726e)
The
PLAT_AMU_GROUP1_COUNTERS_MASK
platform definition has been removed. Platforms should specify per-core AMU counter masks via FCONF or a platform-specific mechanism going forward.See: remove
PLAT_AMU_GROUP1_COUNTERS_MASK
(6c8dda1)
Libraries
FCONF
FCONF is no longer added to BL1 and BL2 automatically when the FCONF Makefile (
fconf.mk
) is included. When including this Makefile, consider whether you need to add${FCONF_SOURCES}
and${FCONF_DYN_SOURCES}
toBL1_SOURCES
andBL2_SOURCES
.See: clean up source collection (e04da4c)
Drivers
Arm
Ethos-N
multi-device support
See: multi-device support (1c65989)
13.6.2. New Features
Architecture
Activity Monitors Extension (FEAT_AMU)
enable per-core AMU auxiliary counters (742ca23)
Support for the
HCRX_EL2
register (FEAT_HCX)add build option to enable FEAT_HCX (cb4ec47)
Scalable Matrix Extension (FEAT_SME)
enable SME functionality (dc78e62)
Scalable Vector Extension (FEAT_SVE)
enable SVE for the secure world (0c5e7d1)
System Register Trace Extensions (FEAT_ETMv4, FEAT_ETE and FEAT_ETEv1.1)
Trace Buffer Extension (FEAT_TRBE)
Self-hosted Trace Extension (FEAT_TRF)
RME
add context management changes for FEAT_RME (c5ea4f8)
add ENABLE_RME build option and support for RMM image (5b18de0)
add GPT Library (1839012)
add Realm security state definition (4693ff7)
add register definitions and helper functions for FEAT_RME (81c272b)
add RMM dispatcher (RMMD) (77c2775)
add Test Realm Payload (TRP) (50a3056)
add xlat table library changes for FEAT_RME (3621823)
disable Watchdog for Arm platforms if FEAT_RME enabled (07e96d1)
run BL2 in root world when FEAT_RME is enabled (6c09af9)
Platforms
Allwinner
add R329 support (13bacd3)
Arm
add FWU support in Arm platforms (2f1177b)
add GPT initialization code for Arm platforms (deb4b3a)
add GPT parser support (ef1daa4)
enable PIE when RESET_TO_SP_MIN=1 (7285fd5)
FPGA
FVP
FVP-R
support for TB-R has been added
configure system registers to boot rich OS (28bbbf3)
RD
SGI
TC
enable MPMM (c19a82b)
Enable SVE for both secure and non-secure world (10198ea)
populate HW_CONFIG in BL31 (34a87d7)
introduce TC1 platform (6ec0c65)
add DRAM2 to TZC non-secure region (76b4a6b)
add bootargs node (4a840f2)
add cpu capacity to provide scheduling information (309f593)
add Ivy partition (a19bd32)
add support for trusted services (ca93248)
update Matterhorn ELP DVFS clock index (a2f6294)
update mhuv2 dts node to align with upstream driver (63067ce)
Diphda
Marvell
MediaTek
enable software reset for CIRQ (b3b162f)
MT8192
add DFD control in SiP service (5183e63)
MT8195
add DFD control in SiP service (3b994a7)
add display port control in SiP service (7eb4223)
remove adsp event from wakeup source (c260b32)
add DCM driver (49d3bd8)
add EMI MPU basic drivers (75edd34)
add SPM suspend driver (859e346)
add support for PTP3 (0481896)
add vcore-dvfs support (d562130)
support MCUSYS off when system suspend (d336e09)
NXP
add build macro for BOOT_MODE validation checking (cd1280e)
add CCI and EPU address definition (6cad59c)
add EESR register definition (8bfb168)
add SecMon register definition for ch_3_2 (66f7884)
define common macro for ARM registers (35efe7a)
define default PSCI features if not defined (a204785)
define default SD buffer (4225ce8)
i.MX
Layerscape
QTI
Renesas
R-Car
change process for Suspend To RAM (731aa26)
R-Car 3
add a DRAM size setting for M3N (f95d551)
add new board revision for Salvator-XS/H3ULCB (4379a3e)
add optional support for gzip-compressed BL33 (ddf2ca0)
add process of SSCG setting for R-Car D3 (14f0a08)
add process to back up X6 and X7 register’s value (7d58aed)
add SYSCEXTMASK bit set/clear in scu_power_up (63a7a34)
apply ERRATA_A53_1530924 and ERRATA_A57_1319537 (2892fed)
change the memory map for OP-TEE (a4d821a)
emit RPC status to DT fragment if RPC unlocked (12c75c8)
keep RWDT enabled (8991086)
modify LifeC register setting for R-Car D3 (5460f82)
modify operation register from SYSCISR to SYSCISCR (d10f876)
modify SWDT counter setting for R-Car D3 (053c134)
remove access to RMSTPCRn registers in R-Car D3 (71f2239)
update DDR setting for R-Car D3 (042d710)
update IPL and Secure Monitor Rev.3.0.0 (c5f5bb1)
use PRR cut to determine DRAM size on M3 (42ffd27)
ST
add a new DDR firewall management (4584e01)
add a USB DFU stack (efbd65f)
add helper to save boot interface (7e87ba2)
add STM32CubeProgrammer support on USB (afad521)
add STM32MP_EMMC_BOOT option (214c8a8)
create new helper for DT access (ea97bbf)
implement platform functions for SMCCC_ARCH_SOC_ID (3d20178)
improve FIP image loading from MMC (18b415b)
manage io_policies with FCONF (d5a84ee)
use FCONF to configure platform (29332bc)
use FIP to load images (1d204ee)
ST32MP1
Xilinx
Bootloader Images
import BL_NOBITS_{BASE,END} when defined (9aedca0)
Services
FF-A
adding notifications SMC IDs (fc3f480)
change manifest messaging method (bb320db)
feature retrieval through FFA_FEATURES call (96b71eb)
update FF-A version to v1.1 (e1c732d)
add Ivy partition to tb fw config (1bc02c2)
add support for FFA_SPM_ID_GET (70c121a)
route secure interrupts to SPMC (8cb99c3)
Libraries
Drivers
Miscellaneous
Debug
add new macro ERROR_NL() to print just a newline (fd1360a)
CRC32
DT Bindings
add STM32MP1 TZC400 bindings (43de546)
FDT Wrappers
add CPU enumeration utility function (2d9ea36)
FDTs
NXP
Dependencies
libfdt
also allow changing base address (4d585fe)
13.6.3. Resolved Issues
Architecture
Platforms
print newline before fatal abort error message (a5fea81)
Allwinner
delay after enabling CPU power (86a7429)
Arm
Marvell
Check the required libraries before building doimage (dd47809)
Armada
select correct pcie reference clock source (371648e)
fix MSS loader for A8K family (dceac43)
A3K
disable HANDLE_EA_EL3_FIRST by default (3017e93)
enable workaround for erratum 1530924 (975563d)
Fix building uart-images.tgz.bin archive (d3f8db0)
Fix check for external dependences (2baf503)
fix printing info messages on output (9f6d154)
update information about PCIe abort hack (068fe91)
Remove encryption password (076374c)
A8K
MediaTek
NXP
QEMU
QTI
SC1780
qti smc addition (cc35a37)
Raspberry Pi
Raspberry Pi 4
drop /memreserve/ region (5d2793a)
Renesas
Rockchip
Socionext
Synquacer
update scmi power domain off handling (f7f5d2c)
ST
add STM32IMAGE_SRC (f223505)
add UART reset in crash console init (b38e2ed)
apply security at the end of BL2 (99080bd)
correct BSEC error code management (72c7884)
correct IO compensation disabling (c2d18ca)
correct signedness comparison issue (5657dec)
improve DDR get size function (91ffc1d)
only check header major when booting (8ce8918)
panic if boot interface is wrong (71693a6)
remove double space (306dcd6)
ST32MP1
add bl prefix for internal linker script (7684ddd)
Xilinx
Services
Libraries
LIBC
use long for 64-bit types on aarch64 (4ce3e99)
CPU Support
correct Demeter CPU name (4cb576a)
workaround for Cortex A78 erratum 2242635 (1ea9190)
workaround for Cortex-A710 erratum 2058056 (744bdbf)
workaround for Neoverse V1 erratum 2216392 (4c8fe6b)
workaround for Neoverse-N2 erratum 2138953 (ef8f0c5)
workaround for Neoverse-N2 erratum 2138958 (c948185)
workaround for Neoverse-N2 erratum 2242400 (603806d)
workaround for Neoverse-N2 erratum 2242415 (5819e23)
workaround for Neoverse-N2 erratum 2280757 (0d2d999)
rename Matterhorn, Matterhorn ELP, and Klein CPUs (c6ac4df)
EL3 Runtime
OP-TEE
correct signedness comparison (21d2be8)
GPT
Translation Tables
remove always true check in assert (74d720a)
Drivers
Miscellaneous
use correct printf format for uint64_t (4ef449c)
DT Bindings
fix static checks (0861fcd)
FDTs
PIE
invalidate data cache in the entire image range if PIE is enabled (596d20d)
Security
Set MDCR_EL3.MCCD bit (12f6c06)
SDEI
Documentation
Build System
Tools
Dependencies
checkpatch
do not check merge commits (77a0a7f)
13.7. 2.5.0 (2021-05-17)
13.7.1. New Features
Architecture support
Added support for speculation barrier(
FEAT_SB
) for non-Armv8.5 platforms starting from Armv8.0Added support for Activity Monitors Extension version 1.1(
FEAT_AMUv1p1
)Added helper functions for Random number generator(
FEAT_RNG
) registersAdded support for Armv8.6 Multi-threaded PMU extensions (
FEAT_MTPMU
)Added support for MTE Asymmetric Fault Handling extensions(
FEAT_MTE3
)Added support for Privileged Access Never extensions(
FEAT_PANx
)
Bootloader images
Added PIE support for AArch32 builds
Enable Trusted Random Number Generator service for BL32(sp_min)
Build System
Added build option for Arm Feature Modifiers
Drivers
Added support for interrupts in TZC-400 driver
Broadcom
Added support for I2C, MDIO and USB drivers
Marvell
Added support for secure read/write of dfc register-set
Added support for thermal sensor driver
Implement a3700_core_getc API in console driver
Added rx training on 10G port
Marvell Mochi
Added support for cn913x in PCIe mode
Marvell Armada A8K
Added support for TRNG-IP-76 driver and accessing RNG register
Mediatek MT8192
Added support for following drivers
MPU configuration for SCP/PCIe
SPM suspend
Vcore DVFS
LPM
PTP3
UART save and restore
Power-off
PMIC
CPU hotplug and MCDI support
SPMC
MPU
Mediatek MT8195
Added support for following drivers
GPIO, NCDI, SPMC drivers
Power-off
CPU hotplug, reboot and MCDI
Delay timer and sys timer
GIC
NXP
Added support for
non-volatile storage API
chain of trust and trusted board boot using two modes: MBEDTLS and CSF
fip-handler necessary for DDR initialization
SMMU and console drivers
crypto hardware accelerator driver
following drivers: SD, EMMC, QSPI, FLEXSPI, GPIO, GIC, CSU, PMU, DDR
NXP Security Monitor and SFP driver
interconnect config APIs using ARM CCN-CCI driver
TZC APIs to configure DDR region
generic timer driver
Device configuration driver
IMX
Added support for image loading and io-storage driver for TBBR fip booting
Renesas
Added support for PFC and EMMC driver
RZ Family:
G2N, G2E and G2H SoCs
Added support for watchdog, QoS, PFC and DRAM initialization
RZG Family:
G2M
Added support for QoS and DRAM initialization
Xilinx
Added JTAG DCC support for Versal and ZynqMP SoC family.
Libraries
C standard library
Added support to print
%
insnprintf()
andprintf()
APIsAdded support for strtoull, strtoll, strtoul, strtol APIs from FreeBSD project
CPU support
Added support for
Cortex_A78C CPU
Makalu ELP CPU
Makalu CPU
Matterhorn ELP CPU
Neoverse-N2 CPU
CPU Errata
Arm Cortex-A76: Added workaround for erratum 1946160
Arm Cortex-A77: Added workaround for erratum 1946167
Arm Cortex-A78: Added workaround for erratum 1941498 and 1951500
Arm Neoverse-N1: Added workaround for erratum 1946160
Flattened device tree(libfdt)
Added support for wrapper function to read UUIDs in string format from dtb
Platforms
Added support for MediaTek MT8195
Added support for Arm RD-N2 board
Allwinner
Added support for H616 SoC
Arm
Added support for GPT parser
Protect GICR frames for fused/unused cores
Arm Morello
Added VirtIO network device to Morello FVP fdts
Arm RD-N2
Added support for variant 1 of RD-N2 platform
Enable AMU support
Arm RD-V1
Enable AMU support
Arm SGI
Added support for platform variant build option
Arm TC0
Added Matterhorn ELP CPU support
Added support for opteed
Arm Juno
Added support to use hw_config in BL31
Use TRNG entropy source for SMCCC TRNG interface
Condition Juno entropy source with CRC instructions
Marvell Mochi
Added support for detection of secure mode
Marvell ARMADA
Added support for new compile option A3720_DB_PM_WAKEUP_SRC
Added support doing system reset via CM3 secure coprocessor
Made several makefile enhancements required to build WTMI_MULTI_IMG and TIMDDRTOOL
Added support for building DOIMAGETOOL tool
Added new target mrvl_bootimage
Mediatek MT8192
Added support for rtc power off sequence
Mediatek MT8195
Added support for SiP service
STM32MP1
Added support for
Seeed ODYSSEY SoM and board
SDMMC2 and I2C2 pins in pinctrl
I2C2 peripheral in DTS
PIE for BL32
TZC-400 interrupt managament
Linux Automation MC-1 board
Renesas RZG
Added support for identifying EK874 RZ/G2E board
Added support for identifying HopeRun HiHope RZ/G2H and RZ/G2H boards
Rockchip
Added support for stack protector
QEMU
Added support for
max
CPUAdded Cortex-A72 support to
virt
platformEnabled trigger reboot from secure pl061
QEMU SBSA
Added support for sbsa-ref Embedded Controller
NXP
Added support for warm reset to retain ddr content
Added support for image loader necessary for loading fip image
lx2160a SoC Family
Added support for
new platform lx2160a-aqds
new platform lx2160a-rdb
new platform lx2162a-aqds
errata handling
IMX imx8mm
Added support for trusted board boot
TI K3
Added support for lite device board
Enabled Cortex-A72 erratum 1319367
Enabled Cortex-A53 erratum 1530924
Xilinx ZynqMP
Added support for PS and system reset on WDT restart
Added support for error management
Enable support for log messages necessary for debug
Added support for PM API SMC call for efuse and register access
Processes
Introduced process for platform deprecation
Added documentation for TF-A threat model
Provided a copy of the MIT license to comply with the license requirements of the arm-gic.h source file (originating from the Linux kernel project and re-distributed in TF-A).
Services
Added support for TRNG firmware interface service
Arm
Added SiP service to configure Ethos-N NPU
SPMC
Added documentation for SPM(Hafnium) SMMUv3 driver
SPMD
Added support for
FFA_INTERRUPT forwading ABI
FFA_SECONDARY_EP_REGISTER ABI
FF-A v1.0 boot time power management, SPMC secondary core boot and early run-time power management
Tools
FIPTool
Added mechanism to allow platform specific image UUID
git hooks
Added support for conventional commits through commitlint hook, commitizen hook and husky configuration files.
NXP tool
Added support for a tool that creates pbl file from BL2
Renesas RZ/G2
Added tool support for creating bootparam and cert_header images
CertCreate
Added support for platform-defined certificates, keys, and extensions using the platform’s makefile
shared tools
Added EFI_GUID representation to uuid helper data structure
13.7.2. Changed
Common components
Print newline after hex address in aarch64 el3_panic function
Use proper
#address-cells
and#size-cells
for reserved-memory in dtbs
Drivers
Move SCMI driver from ST platform directory and make it common to all platforms
Arm GICv3
Shift eSPI register offset in GICD_OFFSET_64()
Use mpidr to probe GICR for current CPU
Arm TZC-400
Adjust filter tag if it set to FILTER_BIT_ALL
Cadence
Enhance UART driver APIs to put characters to fifo
Mediatek MT8192
Move timer driver to common folder
Enhanced sys_cirq driver to add more IC services
Renesas
Move ddr and delay driver to common directory
Renesas rcar
Treat log as device memory in console driver
Renesas RZ Family:
G2N and G2H SoCs
Select MMC_CH1 for eMMC channel
Marvell
Added support for checking if TRNG unit is present
Marvell A3K
Set TXDCLK_2X_SEL bit during PCIe initialization
Set mask parameter for every reg_set call
Marvell Mochi
Added missing stream IDs configurations
MbedTLS
Migrated to Mbed TLS v2.26.0
IMX imx8mp
Change the bl31 physical load address
QEMU SBSA
Enable secure variable storage
SCMI
Update power domain protocol version to 2.0
STM32
Remove dead code from nand FMC driver
Libraries
C Standard Library
Use macros to reduce duplicated code between snprintf and printf
CPU support
Sanity check pointers before use in AArch32 builds
Arm Cortex-A78
Remove rainier cpu workaround for errata 1542319
Arm Makalu ELP
Added “_arm” suffix to Makalu ELP CPU lib
Miscellaneous
Editorconfig
set max line length to 100
Platforms
Allwinner
Added reserved-memory node to DT
Express memmap more dynamically
Move SEPARATE_NOBITS_REGION to platforms
Limit FDT checks to reduce code size
Use CPUIDLE hardware when available
Allow conditional compilation of SCPI and native PSCI ops
Always use a 3MHz RSB bus clock
Enable workaround for Cortex-A53 erratum 1530924
Fixed non-default PRELOADED_BL33_BASE
Leave CPU power alone during BL31 setup
Added several psci hooks enhancements to improve system shutdown/reset sequence
Return the PMIC to I2C mode after use
Separate code to power off self and other CPUs
Split native and SCPI-based PSCI implementations
Allwinner H6
Added R_PRCM security setup for H6 board
Added SPC security setup for H6 board
Use RSB for the PMIC connection on H6
Arm
Store UUID as a string, rather than ints
Replace FIP base and size macro with a generic name
Move compile time switch from source to dt file
Don’t provide NT_FW_CONFIG when booting hafnium
Do not setup ‘disabled’ regulator
Increase SP max size
Remove false dependency of ARM_LINUX_KERNEL_AS_BL33 on RESET_TO_BL31 and allow it to be enabled independently
Arm FVP
Do not map GIC region in BL1 and BL2
Arm Juno
Refactor juno_getentropy() to return 64 bits on each call
Arm Morello
Remove “virtio-rng” from Morello FVP
Enable virtIO P9 device for Morello fvp
Arm RDV1
Allow all PSCI callbacks on RD-V1
Rename rddaniel to rdv1
Arm RDV1MC
Rename rddanielxlr to rdv1mc
Initialize TZC-400 controllers
Arm TC0
Updated GICR base address
Use scmi_dvfs clock index 1 for cores 4-7 through fdt
Added reserved-memory node for OP-TEE fdts
Enabled Theodul DSU in TC platform
OP-TEE as S-EL1 SP with SPMC at S-EL2
Update Matterhorm ELP DVFS clock index
Arm SGI
Allow access to TZC controller on all chips
Define memory regions for multi-chip platforms
Allow access to nor2 flash and system registers from S-EL0
Define default list of memory regions for DMC-620 TZC
Improve macros defining cper buffer memory region
Refactor DMC-620 error handling SMC function id
Refactor SDEI specific macros
Added platform id value for RDN2 platform
Refactored header file inclusions and inclusion of memory mapping
Arm RDN2
Allow usage of secure partitions on RDN2 platform
Update GIC redistributor and TZC base address
Arm SGM775
Deprecate Arm sgm775 FVP platform
Marvell
Increase TX FIFO EMPTY timeout from 2ms to 3ms
Update delay code to be compatible with 1200 MHz CPU
Marvell ARMADA
Postpone MSS CPU startup to BL31 stage
Allow builds without MSS support
Use MSS SRAM in secure mode
Added missing FORCE, .PHONY and clean targets
Cleanup MSS SRAM if used for copy
Move definition of mrvl_flash target to common marvell_common.mk file
Show informative build messages and blank lines
Marvell ARMADA A3K
Added a new target mrvl_uart which builds UART image
Added checks that WTP, MV_DDR_PATH and CRYPTOPP_PATH are correctly defined
Allow use of the system Crypto++ library
Build $(WTMI_ENC_IMG) in $(BUILD_PLAT) directory
Build intermediate files in $(BUILD_PLAT) directory
Build UART image files directly in $(BUILD_UART) subdirectory
Correctly set DDR_TOPOLOGY and CLOCKSPRESET for WTMI
Do not use ‘echo -e’ in Makefile
Improve 4GB DRAM usage from 3.375 GB to 3.75 GB
Remove unused variable WTMI_SYSINIT_IMG from Makefile
Simplify check if WTP variable is defined
Split building $(WTMI_MULTI_IMG) and $(TIMDDRTOOL)
Marvell ARMADA A8K
Allow CP1/CP2 mapping at BLE stage
Mediatek MT8183
Added timer V20 compensation
Nvidia Tegra
Rename SMC API
TI K3
Make plat_get_syscnt_freq2 helper check CNT_FID0 register
Fill non-message data fields in sec_proxy with 0x0
Update ti_sci_msg_req_reboot ABI to include domain
Enable USE_COHERENT_MEM only for the generic board
Explicitly map SEC_SRAM_BASE to 0x0
Use BL31_SIZE instead of computing
Define the correct number of max table entries and increase SRAM size to account for additional table
Raspberry Pi4
Switch to gicv2.mk and GICV2_SOURCES
Renesas
Move headers and assembly files to common folder
Renesas rzg
Added device tree memory node enhancements
Rockchip
Switch to using common gicv3.mk
STM32MP1
Set BL sizes regardless of flags
QEMU
Include gicv2.mk for compiling GICv2 source files
Change DEVICE2 definition for MMU
Added helper to calculate the position shift from MPIDR
QEMU SBSA
Include libraries for Cortex-A72
Increase SHARED_RAM_SIZE
Addes support in spm_mm for upto 512 cores
Added support for topology handling
QTI
Mandate SMC implementation
Xilinx
Rename the IPI CRC checksum macro
Use fno-jump-tables flag in CPPFLAGS
Xilinx versal
Added the IPI CRC checksum macro support
Mark IPI calls secure/non-secure
Enable sgi to communicate with linux using IPI
Remove Cortex-A53 compilation
Xilinx ZynqMP
Configure counter frequency during initialization
Filter errors related to clock gate permissions
Implement pinctrl request/release EEMI API
Reimplement pinctrl get/set config parameter EEMI API calls
Reimplement pinctrl set/get function EEMI API
Update error codes to match Linux and PMU Firmware
Update PM version and support PM version check
Update return type in query functions
Added missing ids for 43/46/47dr devices
Checked for DLL status before doing reset
Disable ITAPDLYENA bit for zero ITAP delay
Include GICv2 makefile
Remove the custom crash implementation
Services
SPMD
Lock the g_spmd_pm structure
Declare third cactus instance as UP SP
Provide number of vCPUs and VM size for first SP
Remove
chosen
node from SPMC manifestsMove OP-TEE SP manifest DTS to FVP platform
Update OP-TEE SP manifest with device-regions node
Remove device-memory node from SPMC manifests
SPM_MM
Use sp_boot_info to set SP context
SDEI
Updata the affinity of shared event
Tools
FIPtool
Do not print duplicate verbose lines about building fiptool
CertCreate
Updated tool for platform defined certs, keys & extensions
Create only requested certificates
Avoid duplicates in extension stack
13.7.3. Resolved Issues
Several fixes for typos and mis-spellings in documentation
Build system
Fixed ${FIP_NAME} to be rebuilt only when needed in Makefile
Do not mark file targets as .PHONY target in Makefile
Drivers
Authorization
Avoid NV counter upgrade without certificate validation
Arm GICv3
Fixed logical issue for num_eints
Limit SPI ID to avoid misjudgement in GICD_OFFSET()
Fixed potential GICD context override with ESPI enabled
Marvell A3700
Fixed configuring polarity invert bits
Arm TZC-400
Correct FAIL_CONTROL Privileged bit
Fixed logical error in FILTER_BIT definitions
Renesas rcar
Fixed several coding style violations reported by checkpatch
Libraries
Arch helpers
Fixed assertions in processing dynamic relocations for AArch64 builds
C standard library
Fixed MISRA issues in memset() ABI
RAS
Fixed bug of binary search in RAS interrupt handler
Platforms
Arm
Fixed missing copyrights in Arm-gic.h file
Fixed the order of header files in several dts files
Fixed error message printing in board makefile
Fixed bug of overriding the last node in image load helper API
Fixed stdout-path in fdts files of TC0 and N1SDP platforms
Turn ON/OFF redistributor in sync with GIC CPU interface ON/OFF for css platforms
Arm FVP
Fixed Generic Timer interrupt types in platform dts files
Arm Juno
Fixed parallel build issue for romlib config
Arm SGI
Fixed bug in SDEI receive event of RAS handler
Intel Agilex
Fixed PLAT_MAX_PWR_LVL value
Marvell
Fixed SPD handling in dram port
Marvell ARMADA
Fixed TRNG return SMC handling
Fixed the logic used for LD selector mask
Fixed MSS firmware loader for A8K family
ST
Fixed few violations reported by coverity static checks
STM32MP1
Fixed SELFREF_TO_X32 mask in ddr driver
Do not keep mmc_device_info in stack
Correct plat_crash_console_flush()
QEMU SBSA
Fixed memory type of secure NOR flash
QTI
Fixed NUM_APID and REG_APID_MAP() argument in SPMI driver
Intel
Do not keep mmc_device_info in stack
Hisilicon
Do not keep mmc_device_info in stack
Services
EL3 runtime
Fixed the EL2 context save/restore routine by removing EL2 generic timer system registers
Added fix for exception handler in BL31 by synchronizing pending EA using DSB barrier
SPMD
Fixed error codes to use int32_t type
TSPD
Added bug fix in tspd interrupt handling when TSP_NS_INTR_ASYNC_PREEMPT is enabled
TRNG
Fixed compilation errors with -O0 compile option
DebugFS
Checked channel index before calling clone function
PSCI
Fixed limit of 256 CPUs caused by cast to unsigned char
TSP
Fixed compilation erros when built with GCC 11.0.0 toolchain
Tools
FIPtool
Do not call
make clean
forall
target
CertCreate
Fixed bug to avoid cleaning when building the binary
Used preallocated parts of the HASH struct to avoid leaking HASH struct fields
Free arguments copied with strdup
Free keys after use
Free X509_EXTENSION structures on stack to avoid leaking them
Optimized the code to avoid unnecessary attempts to create non-requested certificates
13.8. 2.4.0 (2020-11-17)
13.8.1. New Features
Architecture support
Armv8.6-A
Added support for Armv8.6 Enhanced Counter Virtualization (ECV)
Added support for Armv8.6 Fine Grained Traps (FGT)
Added support for Armv8.6 WFE trap delays
Bootloader images
Added support for Measured Boot
Build System
Added build option
COT_DESC_IN_DTB
to create Chain of Trust at runtimeAdded build option
OPENSSL_DIR
to direct tools to OpenSSL librariesAdded build option
RAS_TRAP_LOWER_EL_ERR_ACCESS
to enable trapping RAS register accesses from EL1/EL2 to EL3Extended build option
BRANCH_PROTECTION
to support branch target identification
Common components
Added support for exporting CPU nodes to the device tree
Added support for single and dual-root Chains of Trust in secure partitions
Drivers
Added Broadcom RNG driver
Added Marvell
mg_conf_cm3
driverAdded System Control and Management Interface (SCMI) driver
Added STMicroelectronics ETZPC driver
Arm GICv3
Added support for detecting topology at runtime
Dual Root
Added support for platform certificates
Marvell Cache LLC
Added support for mapping the entire LLC into SRAM
Marvell CCU
Added workaround for erratum 3033912
Marvell CP110 COMPHY
Added support for SATA COMPHY polarity inversion
Added support for USB COMPHY polarity inversion
Added workaround for erratum IPCE_COMPHY-1353
STM32MP1 Clocks
Added
RTC
as a gateable clockAdded support for shifted clock selector bit masks
Added support for using additional clocks as parents
Libraries
C standard library
Added support for hexadecimal and pointer format specifiers in
snprint()
Added assembly alternatives for various library functions
CPU support
Arm Cortex-A53
Added workaround for erratum 1530924
Arm Cortex-A55
Added workaround for erratum 1530923
Arm Cortex-A57
Added workaround for erratum 1319537
Arm Cortex-A76
Added workaround for erratum 1165522
Added workaround for erratum 1791580
Added workaround for erratum 1868343
Arm Cortex-A72
Added workaround for erratum 1319367
Arm Cortex-A77
Added workaround for erratum 1508412
Added workaround for erratum 1800714
Added workaround for erratum 1925769
Arm Neoverse-N1
Added workaround for erratum 1868343
EL3 Runtime
Added support for saving/restoring registers related to nested virtualization in EL2 context switches if the architecture supports it
FCONF
Added support for Measured Boot
Added support for populating Chain of Trust properties
Added support for loading the
fw_config
image
Measured Boot
Added support for event logging
Platforms
Added support for Arm Morello
Added support for Arm TC0
Added support for iEi PUZZLE-M801
Added support for Marvell OCTEON TX2 T9130
Added support for MediaTek MT8192
Added support for NXP i.MX 8M Nano
Added support for NXP i.MX 8M Plus
Added support for QTI CHIP SC7180
Added support for STM32MP151F
Added support for STM32MP153F
Added support for STM32MP157F
Added support for STM32MP151D
Added support for STM32MP153D
Added support for STM32MP157D
Arm
Added support for platform-owned SPs
Added support for resetting to BL31
Arm FPGA
Added support for Klein
Added support for Matterhorn
Added support for additional CPU clusters
Arm FVP
Added support for performing SDEI platform setup at runtime
Added support for SMCCC’s
SMCCC_ARCH_SOC_ID
commandAdded an
id
field under the NV-counter node in the device tree to differentiate between trusted and non-trusted NV-countersAdded support for extracting the clock frequency from the timer node in the device tree
Arm Juno
Added support for SMCCC’s
SMCCC_ARCH_SOC_ID
command
Arm N1SDP
Added support for cross-chip PCI-e
Marvell
Added support for AVS reduction
Marvell ARMADA
Added support for twin-die combined memory device
Marvell ARMADA A8K
Added support for DDR with 32-bit bus width (both ECC and non-ECC)
Marvell AP806
Added workaround for erratum FE-4265711
Marvell AP807
Added workaround for erratum 3033912
Nvidia Tegra
Added debug printouts indicating SC7 entry sequence completion
Added support for SDEI
Added support for stack protection
Added support for GICv3
Added support for SMCCC’s
SMCCC_ARCH_SOC_ID
command
Nvidia Tegra194
Added support for RAS exception handling
Added support for SPM
NXP i.MX
Added support for SDEI
QEMU SBSA
Added support for the Secure Partition Manager
QTI
Added RNG driver
Added SPMI PMIC arbitrator driver
Added support for SMCCC’s
SMCCC_ARCH_SOC_ID
command
STM32MP1
Added support for exposing peripheral interfaces to the non-secure world at runtime
Added support for SCMI clock and reset services
Added support for STM32MP15x CPU revision Z
Added support for SMCCC services in
SP_MIN
Services
Secure Payload Dispatcher
Added a provision to allow clients to retrieve the service UUID
SPMC
Added secondary core endpoint information to the SPMC context structure
SPMD
Added support for booting OP-TEE as a guest S-EL1 Secure Partition on top of Hafnium in S-EL2
Added a provision for handling SPMC messages to register secondary core entry points
Added support for power management operations
Tools
CertCreate
Added support for secure partitions
CertTool
Added support for the
fw_config
image
FIPTool
Added support for the
fw_config
image
13.8.2. Changed
Architecture support
Bootloader images
Build System
The top-level Makefile now supports building FipTool on Windows
The default value of
KEY_SIZE
has been changed to to 2048 when RSA is in useThe previously-deprecated macro
__ASSEMBLY__
has now been removed
Common components
Certain functions that flush the console will no longer return error information
Drivers
Arm GIC
Usage of
drivers/arm/gic/common/gic_common.c
has now been deprecated in favour ofdrivers/arm/gic/vX/gicvX.mk
Added support for detecting the presence of a GIC600-AE
Added support for detecting the presence of a GIC-Clayton
Marvell MCI
Now performs link tuning for all MCI interfaces to improve performance
Marvell MoChi
PIDI masters are no longer forced into a non-secure access level when
LLC_SRAM
is enabledThe SD/MMC controllers are now accessible from guest virtual machines
Mbed TLS
Migrated to Mbed TLS v2.24.0
STM32 FMC2 NAND
Adjusted FMC node bindings to include an EBI controller node
STM32 Reset
Added an optional timeout argument to assertion functions
STM32MP1 Clocks
Enabled several additional system clocks during initialization
Libraries
C Standard Library
Improved
memset
performance by avoiding single-byte writesAdded optimized assembly variants of
memset
CPU support
Renamed Cortex-Hercules to Cortex-A78
Renamed Cortex-Hercules AE to Cortex-A78 AE
Renamed Neoverse Zeus to Neoverse V1
Coreboot
Updated ‘coreboot_get_memory_type’ API to take an extra argument as a ’memory size’ that used to return a valid memory type.
libfdt
Updated to latest upstream version
Platforms
Allwinner
Disabled non-secure access to PRCM power control registers
Arm
BL32_BASE
is now platform-dependent whenSPD_spmd
is enabledAdded support for loading the Chain of Trust from the device tree
The firmware update check is now executed only once
NV-counter base addresses are now loaded from the device tree when
COT_DESC_IN_DTB
is enabledNow loads and populates
fw_config
andtb_fw_config
FCONF population now occurs after caches have been enabled in order to reduce boot times
Arm Corstone-700
Platform support has been split into both an FVP and an FPGA variant
Arm FPGA
DTB and BL33 load addresses have been given sensible default values
Now reads generic timer counter frequency, GICD and GICR base addresses, and UART address from DT
Now treats the primary PL011 UART as an SBSA Generic UART
Arm FVP
Secure interrupt descriptions, UART parameters, clock frequencies and GICv3 parameters are now queried through FCONF
UART parameters are now queried through the device tree
Added an owner field to Cactus secure partitions
Increased the maximum size of BL2 when the Chain of Trust is loaded from the device tree
Reduces the maximum size of BL31
The
FVP_USE_SP804_TIMER
andFVP_VE_USE_SP804_TIMER
build options have been removed in favour of a commonUSE_SP804_TIMER
optionAdded a third Cactus partition to manifests
Device tree nodes now store UUIDs in big-endian
Arm Juno
Increased the maximum size of BL2 when optimizations have not been applied
Reduced the maximum size of BL31 and BL32
Marvell AP807
Enabled snoop filters
Marvell ARMADA A3K
UART recovery images are now suffixed with
.bin
Marvell ARMADA A8K
Option
BL31_CACHE_DISABLE
is now disabled (0
) by default
Nvidia Tegra
Added VPR resize supported check when processing video memory resize requests
Added SMMU verification to prevent potential issues caused by undetected corruption of the SMMU configuration during boot
The GIC CPU interface is now properly disabled after CPU off
The GICv2 sources list and the
BL31_SIZE
definition have been made platform-specificThe SPE driver will no longer flush the console when writing individual characters
Nvidia Tegra194
TZDRAM setup has been moved to platform-specific early boot handlers
Increased verbosity of debug prints for RAS SErrors
Support for powering down CPUs during CPU suspend has been removed
Now verifies firewall settings before using resources
TI K3
The UART number has been made configurable through
K3_USART
Rockchip RK3368
The maximum number of memory map regions has been increased to 20
Socionext Uniphier
The maximum size of BL33 has been increased to support larger bootloaders
STM32
Removed platform-specific DT functions in favour of using existing generic alternatives
STM32MP1
Increased verbosity of exception reports in debug builds
Device trees have been updated to align with the Linux kernel
Now uses the ETZPC driver to configure secure-aware interfaces for assignment to the non-secure world
Finished good variants have been added to the board identifier enumerations
Non-secure access to clocks and reset domains now depends on their state of registration
NEON is now disabled in
SP_MIN
The last page of
SYSRAM
is now used as SCMI shared memoryChecks to verify platform compatibility have been added to verify that an image is compatible with the chip ID of the running platform
QEMU SBSA
Removed support for Arm’s Cortex-A53
Services
Renamed SPCI to FF-A
SPMD
No longer forwards requests to the non-secure world when retrieving partition information
SPMC manifest size is now retrieved directly from SPMD instead of the device tree
The FF-A version handler now returns SPMD’s version when the origin of the call is secure, and SPMC’s version when the origin of the call is non-secure
SPMC
Updated the manifest to declare CPU nodes in descending order as per the SPM (Hafnium) multicore requirement
Updated the device tree to mark 2GB as device memory for the first partition excluding trusted DRAM region (which is reserved for SPMC)
Increased the number of EC contexts to the maximum number of PEs as per the FF-A specification
Tools
FIPTool
Now returns
0
onhelp
andhelp <command>
Marvell DoImage
Updated Mbed TLS support to v2.8
SPTool
Now appends CertTool arguments
13.8.3. Resolved Issues
Bootloader images
Fixed compilation errors for dual-root Chains of Trust caused by symbol collision
BL31
Fixed compilation errors on platforms with fewer than 4 cores caused by initialization code exceeding the end of the stacks
Fixed compilation errors when building a position-independent image
Build System
Fixed invalid empty version strings
Fixed compilation errors on Windows caused by a non-portable architecture revision comparison
Drivers
Arm GIC
Fixed spurious interrupts caused by a missing barrier
STM32 Flexible Memory Controller 2 (FMC2) NAND driver
Fixed runtime instability caused by incorrect error detection logic
STM32MP1 Clock driver
Fixed incorrectly-formatted log messages
Fixed runtime instability caused by improper clock gating procedures
STMicroelectronics Raw NAND driver
Fixed runtime instability caused by incorrect unit conversion when waiting for NAND readiness
Libraries
AMU
Fixed timeout errors caused by excess error logging
EL3 Runtime
Fixed runtime instability caused by improper register save/restore routine in EL2
FCONF
Fixed failure to initialize GICv3 caused by overly-strict device tree requirements
Measured Boot
Fixed driver errors caused by a missing default value for the
HASH_ALG
build option
SPE
Fixed feature detection check that prevented CPUs supporting SVE from detecting support for SPE in the non-secure world
Translation Tables
Fixed various MISRA-C 2012 static analysis violations
Platforms
Allwinner A64
Fixed USB issues on certain battery-powered device caused by improperly activated USB power rail
Arm
Fixed compilation errors caused by increase in BL2 size
Fixed compilation errors caused by missing Makefile dependencies to generated files when building the FIP
Fixed MISRA-C 2012 static analysis violations caused by unused structures in include directives intended to be feature-gated
Arm FPGA
Fixed initialization issues caused by incorrect MPIDR topology mapping logic
Arm RD-N1-edge
Fixed compilation errors caused by mismatched parentheses in Makefile
Arm SGI
Fixed crashes due to the flash memory used for cold reboot attack protection not being mapped
Intel Agilex
Fixed initialization issues caused by several compounding bugs
Marvell
Fixed compilation warnings caused by multiple Makefile inclusions
Marvell ARMADA A3K
Fixed boot issue in debug builds caused by checks on the BL33 load address that are not appropriate for this platform
Nvidia Tegra
Fixed incorrect delay timer reads
Fixed spurious interrupts in the non-secure world during cold boot caused by the arbitration bit in the memory controller not being cleared
Fixed faulty video memory resize sequence
Nvidia Tegra194
Fixed incorrect alignment of TZDRAM base address
NXP iMX8M
Fixed CPU hot-plug issues caused by race condition
STM32MP1
Fixed compilation errors in highly-parallel builds caused by incorrect Makefile dependencies
STM32MP157C-ED1
Fixed initialization issues caused by missing device tree hash node
Raspberry Pi 3
Fixed compilation errors caused by incorrect dependency ordering in Makefile
Rockchip
Fixed initialization issues caused by non-critical errors when parsing FDT being treated as critical
Rockchip RK3368
Fixed runtime instability caused by incorrect CPUID shift value
QEMU
Fixed compilation errors caused by incorrect dependency ordering in Makefile
QEMU SBSA
Fixed initialization issues caused by FDT exceeding reserved memory size
QTI
Fixed compilation errors caused by inclusion of a non-existent file
Services
FF-A (previously SPCI)
Fixed SPMD aborts caused by incorrect behaviour when the manifest is page-aligned
Tools
Fixed compilation issues when compiling tools from within their respective directories
FIPTool
Fixed command line parsing issues on Windows when using arguments whose names also happen to be a subset of another’s
Marvell DoImage
Fixed PKCS signature verification errors at boot on some platforms caused by generation of misaligned images
13.8.4. Known Issues
Platforms
NVIDIA Tegra
Signed comparison compiler warnings occurring in libfdt are currently being worked around by disabling the warning for the platform until the underlying issue is resolved in libfdt
13.9. 2.3.0 (2020-04-20)
13.9.1. New Features
Arm Architecture
Add support for Armv8.4-SecEL2 extension through the SPCI defined SPMD/SPMC components.
Build option to support EL2 context save and restore in the secure world (CTX_INCLUDE_EL2_REGS).
Add support for SMCCC v1.2 (introducing the new SMCCC_ARCH_SOC_ID SMC). Note that the support is compliant, but the SVE registers save/restore will be done as part of future S-EL2/SPM development.
BL-specific
Enhanced BL2 bootloader flow to load secure partitions based on firmware configuration data (fconf).
Changes necessary to support SEPARATE_NOBITS_REGION feature
TSP and BL2_AT_EL3: Add Position Independent Execution
PIE
support
Build System
Add support for documentation build as a target in Makefile
Add
COT
build option to select the Chain of Trust to use when the Trusted Boot feature is enabled (default:tbbr
).Added creation and injection of secure partition packages into the FIP.
Build option to support SPMC component loading and run at S-EL1 or S-EL2 (SPMD_SPM_AT_SEL2).
Enable MTE support
Enable Link Time Optimization in GCC
Enable -Wredundant-decls warning check
Makefile: Add support to optionally encrypt BL31 and BL32
Add support to pass the nt_fw_config DTB to OP-TEE.
Introduce per-BL
CPPFLAGS
,ASFLAGS
, andLDFLAGS
build_macros: Add CREATE_SEQ function to generate sequence of numbers
CPU Support
cortex-a57: Enable higher performance non-cacheable load forwarding
Hercules: Workaround for Errata 1688305
Klein: Support added for Klein CPU
Matterhorn: Support added for Matterhorn CPU
Drivers
auth: Add
calc_hash
function for hash calculation. Used for authentication of images when measured boot is enabled.cryptocell: Add authenticated decryption framework, and support for CryptoCell-713 and CryptoCell-712 RSA 3K
gic600: Add support for multichip configuration and Clayton
gicv3: Introduce makefile, Add extended PPI and SPI range, Add support for probing multiple GIC Redistributor frames
gicv4: Add GICv4 extension for GIC driver
io: Add an IO abstraction layer to load encrypted firmwares
mhu: Derive doorbell base address
mtd: Add SPI-NOR, SPI-NAND, SPI-MEM, and raw NAND framework
scmi: Allow use of multiple SCMI channels
scu: Add a driver for snoop control unit
Libraries
coreboot: Add memory range parsing and use generic base address
compiler_rt: Import popcountdi2.c and popcountsi2.c files, aeabi_ldivmode.S file and dependencies
debugFS: Add DebugFS functionality
el3_runtime: Add support for enabling S-EL2
fconf: Add Firmware Configuration Framework (fconf) (experimental).
libc: Add memrchr function
locks: bakery: Use is_dcache_enabled() helper and add a DMB to the ‘read_cache_op’ macro
psci: Add support to enable different personality of the same soc.
xlat_tables_v2: Add support to pass shareability attribute for normal memory region, use get_current_el_maybe_constant() in is_dcache_enabled(), read-only xlat tables for BL31 memory, and add enable_mmu()
New Platforms Support
arm/arm_fpga: New platform support added for FPGA
arm/rddaniel: New platform support added for rd-daniel platform
brcm/stingray: New platform support added for Broadcom stingray platform
nvidia/tegra194: New platform support for Nvidia Tegra194 platform
Platforms
allwinner: Implement PSCI system suspend using SCPI, add a msgbox driver for use with SCPI, and reserve and map space for the SCP firmware
allwinner: axp: Add AXP805 support
allwinner: power: Add DLDO4 power rail
amlogic: axg: Add a build flag when using ATOS as BL32 and support for the A113D (AXG) platform
arm/a5ds: Add ethernet node and L2 cache node in devicetree
arm/common: Add support for the new
dualroot
chain of trustarm/common: Add support for SEPARATE_NOBITS_REGION
arm/common: Re-enable PIE when RESET_TO_BL31=1
arm/common: Allow boards to specify second DRAM Base address and to define PLAT_ARM_TZC_FILTERS
arm/corstone700: Add support for mhuv2 and stack protector
arm/fvp: Add support for fconf in BL31 and SP_MIN. Populate power domain descriptor dynamically by leveraging fconf APIs.
arm/fvp: Add Cactus/Ivy Secure Partition information and use two instances of Cactus at S-EL1
arm/fvp: Add support to run BL32 in TDRAM and BL31 in secure DRAM
arm/fvp: Add support for GICv4 extension and BL2 hash calculation in BL1
arm/n1sdp: Setup multichip gic routing table, update platform macros for dual-chip setup, introduce platform information SDS region, add support to update presence of External LLC, and enable the NEOVERSE_N1_EXTERNAL_LLC flag
arm/rdn1edge: Add support for dual-chip configuration and use CREATE_SEQ helper macro to compare chip count
arm/sgm: Always use SCMI for SGM platforms
arm/sgm775: Add support for dynamic config using fconf
arm/sgi: Add multi-chip mode parameter in HW_CONFIG dts, macros for remote chip device region, chip_id and multi_chip_mode to platform variant info, and introduce number of chips macro
brcm: Add BL2 and BL31 support common across Broadcom platforms
brcm: Add iproc SPI Nor flash support, spi driver, emmc driver, and support to retrieve plat_toc_flags
hisilicon: hikey960: Enable system power off callback
intel: Enable bridge access, SiP SMC secure register access, and uboot entrypoint support
intel: Implement platform specific system reset 2
intel: Introduce mailbox response length handling
imx: console: Use CONSOLE_T_BASE for UART base address and generic console_t data structure
imx8mm: Provide uart base as build option and add the support for opteed spd on imx8mq/imx8mm
imx8qx: Provide debug uart num as build
imx8qm: Apply clk/pinmux configuration for DEBUG_CONSOLE and provide debug uart num as build param
marvell: a8k: Implement platform specific power off and add support for loading MG CM3 images
mediatek: mt8183: Add Vmodem/Vcore DVS init level
qemu: Support optional encryption of BL31 and BL32 images and ARM_LINUX_KERNEL_AS_BL33 to pass FDT address
qemu: Define ARMV7_SUPPORTS_VFP
qemu: Implement PSCI_CPU_OFF and qemu_system_off via semihosting
renesas: rcar_gen3: Add new board revision for M3ULCB
rockchip: Enable workaround for erratum 855873, claim a macro to enable hdcp feature for DP, enable power domains of rk3399 before reset, add support for UART3 as serial output, and initialize reset and poweroff GPIOs with known invalid value
rpi: Implement PSCI CPU_OFF, use MMIO accessor, autodetect Mini-UART vs. PL011 configuration, and allow using PL011 UART for RPi3/RPi4
rpi3: Include GPIO driver in all BL stages and use same “clock-less” setup scheme as RPi4
rpi3/4: Add support for offlining CPUs
st: stm32mp1: platform.mk: Support generating multiple images in one build, migrate to implicit rules, derive map file name from target name, generate linker script with fixed name, and use PHONY for the appropriate targets
st: stm32mp1: Add support for SPI-NOR, raw NAND, and SPI-NAND boot device, QSPI, FMC2 driver
st: stm32mp1: Use stm32mp_get_ddr_ns_size() function, set XN attribute for some areas in BL2, dynamically map DDR later and non-cacheable during its test, add a function to get non-secure DDR size, add DT helper for reg by name, and add compilation flags for boot devices
socionext: uniphier: Turn on ENABLE_PIE
ti: k3: Add PIE support
xilinx: versal: Add set wakeup source, client wakeup, query data, request wakeup, PM_INIT_FINALIZE, PM_GET_TRUSTZONE_VERSION, PM IOCTL, support for suspend related, and Get_ChipID APIs
xilinx: versal: Implement power down/restart related EEMI, SMC handler for EEMI, PLL related PM, clock related PM, pin control related PM, reset related PM, device related PM , APIs
xilinx: versal: Enable ipi mailbox service
xilinx: versal: Add get_api_version support and support to send PM API to PMC using IPI
xilinx: zynqmp: Add checksum support for IPI data, GET_CALLBACK_DATA function, support to query max divisor, CLK_SET_RATE_PARENT in gem clock node, support for custom type flags, LPD WDT clock to the pm_clock structure, idcodes for new RFSoC silicons ZU48DR and ZU49DR, and id for new RFSoC device ZU39DR
Security
Use Speculation Barrier instruction for v8.5+ cores
Add support for optional firmware encryption feature (experimental).
Introduce a new
dualroot
chain of trust.aarch64: Prevent speculative execution past ERET
aarch32: Stop speculative execution past exception returns.
SPCI
Introduced the Secure Partition Manager Dispatcher (SPMD) component as a new standard service.
Tools
cert_create: Introduce CoT build option and TBBR CoT makefile, and define the dualroot CoT
encrypt_fw: Add firmware authenticated encryption tool
memory: Add show_memory script that prints a representation of the memory layout for the latest build
13.9.2. Changed
Arm Architecture
PIE: Make call to GDT relocation fixup generalized
BL-Specific
Increase maximum size of BL2 image
BL31: Discard .dynsym .dynstr .hash sections to make ENABLE_PIE work
BL31: Split into two separate memory regions
Unify BL linker scripts and reduce code duplication.
Build System
Changes to drive cert_create for dualroot CoT
Enable -Wlogical-op always
Enable -Wshadow always
Refactor the warning flags
PIE: Pass PIE options only to BL31
Reduce space lost to object alignment
Set lld as the default linker for Clang builds
Remove -Wunused-const-variable and -Wpadded warning
Remove -Wmissing-declarations warning from WARNING1 level
Drivers
authentication: Necessary fix in drivers to upgrade to mbedtls-2.18.0
console: Integrate UART base address in generic console_t
gicv3: Change API for GICR_IPRIORITYR accessors and separate GICD and GICR accessor functions
io: Change seek offset to signed long long and panic in case of io setup failure
smmu: SMMUv3: Changed retry loop to delay timer
tbbr: Reduce size of hash and ECDSA key buffers when possible
Library Code
libc: Consolidate the size_t, unified, and NULL definitions, and unify intmax_t and uintmax_t on AArch32/64
ROMLIB: Optimize memory layout when ROMLIB is used
xlat_tables_v2: Use ARRAY_SIZE in REGISTER_XLAT_CONTEXT_FULL_SPEC, merge REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE}, and simplify end address checks in mmap_add_region_check()
Platforms
allwinner: Adjust SRAM A2 base to include the ARISC vectors, clean up MMU setup, reenable USE_COHERENT_MEM, remove unused include path, move the NOBITS region to SRAM A1, convert AXP803 regulator setup code into a driver, enable clock before resetting I2C/RSB
allwinner: h6: power: Switch to using the AXP driver
allwinner: a64: power: Use fdt_for_each_subnode, remove obsolete register check, remove duplicate DT check, and make sunxi_turn_off_soc static
allwinner: Build PMIC bus drivers only in BL31, clean up PMIC-related error handling, and synchronize PMIC enumerations
arm/a5ds: Change boot address to point to DDR address
arm/common: Check for out-of-bound accesses in the platform io policies
arm/corstone700: Updating the kernel arguments to support initramfs, use fdts DDR memory and XIP rootfs, and set UART clocks to 32MHz
arm/fvp: Modify multithreaded dts file of DynamIQ FVPs, slightly bump the stack size for bl1 and bl2, remove re-definition of topology related build options, stop reclaiming init code with Clang builds, and map only the needed DRAM region statically in BL31/SP_MIN
arm/juno: Maximize space allocated to SCP_BL2
arm/sgi: Bump bl1 RW limit, mark remote chip shared ram as non-cacheable, move GIC related constants to board files, include AFF3 affinity in core position calculation, move bl31_platform_setup to board file, and move topology information to board folder
common: Refactor load_auth_image_internal().
hisilicon: Remove uefi-tools in hikey and hikey960 documentation
intel: Modify non secure access function, BL31 address mapping, mailbox’s get_config_status, and stratix10 BL31 parameter handling
intel: Remove un-needed checks for qspi driver r/w and s10 unused source code
intel: Change all global sip function to static
intel: Refactor common platform code
intel: Create SiP service header file
marvell: armada: scp_bl2: Allow loading up to 8 images
marvell: comphy-a3700: Support SGMII COMPHY power off and fix USB3 powering on when on lane 2
marvell: Consolidate console register calls
mediatek: mt8183: Protect 4GB~8GB dram memory, refine GIC driver for low power scenarios, and switch PLL/CLKSQ/ck_off/axi_26m control to SPM
qemu: Update flash address map to keep FIP in secure FLASH0
renesas: rcar_gen3: Update IPL and Secure Monitor Rev.2.0.6, update DDR setting for H3, M3, M3N, change fixed destination address of BL31 and BL32, add missing #{address,size}-cells into generated DT, pass DT to OpTee OS, and move DDR drivers out of staging
rockchip: Make miniloader ddr_parameter handling optional, cleanup securing of ddr regions, move secure init to separate file, use base+size for secure ddr regions, bring TZRAM_SIZE values in lined, and prevent macro expansion in paths
rpi: Move plat_helpers.S to common
rpi3: gpio: Simplify GPIO setup
rpi4: Skip UART initialisation
st: stm32m1: Use generic console_t data structure, remove second QSPI flash instance, update for FMC2 pin muxing, and reduce MAX_XLAT_TABLES to 4
socionext: uniphier: Make on-chip SRAM and I/O register regions configurable
socionext: uniphier: Make PSCI related, counter control, UART, pinmon, NAND controller, and eMMC controller base addresses configurable
socionext: uniphier: Change block_addressing flag and the return value type of .is_usb_boot() to bool
socionext: uniphier: Run BL33 at EL2, call uniphier_scp_is_running() only when on-chip STM is supported, define PLAT_XLAT_TABLES_DYNAMIC only for BL2, support read-only xlat tables, use enable_mmu() in common function, shrink UNIPHIER_ROM_REGION_SIZE, prepare uniphier_soc_info() for next SoC, extend boot device detection for future SoCs, make all BL images completely position-independent, make uniphier_mmap_setup() work with PIE, pass SCP base address as a function parameter, set buffer offset and length for io_block dynamically, and use more mmap_add_dynamic_region() for loading images
spd/trusty: Disable error messages seen during boot, allow gic base to be specified with GICD_BASE, and allow getting trusty memsize from BL32_MEM_SIZE instead of TSP_SEC_MEM_SIZE
ti: k3: common: Enable ARM cluster power down and rename device IDs to be more consistent
ti: k3: drivers: ti_sci: Put sequence number in coherent memory and remove indirect structure of const data
xilinx: Move ipi mailbox svc to xilinx common
xilinx: zynqmp: Use GIC framework for warm restart
xilinx: zynqmp: pm: Move custom clock flags to typeflags, remove CLK_TOPSW_LSBUS from invalid clock list and rename FPD WDT clock ID
xilinx: versal: Increase OCM memory size for DEBUG builds and adjust cpu clock, Move versal_def.h and versal_private to include directory
Tools
sptool: Updated sptool to accommodate building secure partition packages.
13.9.3. Resolved Issues
Arm Architecture
Fix crash dump for lower EL
BL-Specific
Bug fix: Protect TSP prints with lock
Fix boot failures on some builds linked with ld.lld.
Build System
Fix clang build if CC is not in the path.
Fix ‘BL stage’ comment for build macros
Code Quality
coverity: Fix various MISRA violations including null pointer violations, C issues in BL1/BL2/BL31 and FDT helper functions, using boolean essential, type, and removing unnecessary header file and comparisons to LONG_MAX in debugfs devfip
Based on coding guidelines, replace all
unsigned long
depending on if fixed based on AArch32 or AArch64.Unify type of “cpu_idx” and Platform specific defines across PSCI module.
Drivers
auth: Necessary fix in drivers to upgrade to mbedtls-2.18.0
delay_timer: Fix non-standard frequency issue in udelay
gicv3: Fix compiler dependent behavior
gic600: Fix include ordering according to the coding style and power up sequence
Library Code
el3_runtime: Fix stack pointer maintenance on EA handling path, fixup ‘cm_setup_context’ prototype, and adds TPIDR_EL2 register to the context save restore routines
libc: Fix SIZE_MAX on AArch32
locks: T589: Fix insufficient ordering guarantees in bakery lock
pmf: Fix ‘tautological-constant-compare’ error, Make the runtime instrumentation work on AArch32, and Simplify PMF helper macro definitions across header files
xlat_tables_v2: Fix assembler warning of PLAT_RO_XLAT_TABLES
Platforms
allwinner: Fix H6 GPIO and CCU memory map addresses and incorrect ARISC code patch offset check
arm/a5ds: Correct system freq and Cache Writeback Granule, and cleanup enable-method in devicetree
arm/fvp: Fix incorrect GIC mapping, BL31 load address and image size for RESET_TO_BL31=1, topology description of cpus for DynamIQ based FVP, and multithreaded FVP power domain tree
arm/fvp: spm-mm: Correcting instructions to build SPM for FVP
arm/common: Fix ROTPK hash generation for ECDSA encryption, BL2 bug in dynamic configuration initialisation, and current RECLAIM_INIT_CODE behavior
arm/rde1edge: Fix incorrect topology tree description
arm/sgi: Fix the incorrect check for SCMI channel ID
common: Flush dcache when storing timestamp
intel: Fix UEFI decompression issue, memory calibration, SMC SIP service, mailbox config return status, mailbox driver logic, FPGA manager on reconfiguration, and mailbox send_cmd issue
imx: Fix shift-overflow errors, the rdc memory region slot’s offset, multiple definition of ipc_handle, missing inclusion of cdefs.h, and correct the SGIs that used for secure interrupt
mediatek: mt8183: Fix AARCH64 init fail on CPU0
rockchip: Fix definition of struct param_ddr_usage
rpi4: Fix documentation of armstub config entry
st: Correct io possible NULL pointer dereference and device_size type, nand xor_ecc.val assigned value, static analysis tool issues, and fix incorrect return value and correctly check pwr-regulators node
xilinx: zynqmp: Correct syscnt freq for QEMU and fix clock models and IDs of GEM-related clocks
13.9.4. Known Issues
Build System
dtb: DTB creation not supported when building on a Windows host.
This step in the build process is skipped when running on a Windows host. A known issue from the 1.6 release.
Intermittent assertion firing
ASSERT: services/spd/tspd/tspd_main.c:105
Coverity
Intermittent Race condition in Coverity Jenkins Build Job
Platforms
arm/juno: System suspend from Linux does not function as documented in the user guide
Following the instructions provided in the user guide document does not result in the platform entering system suspend state as expected. A message relating to the hdlcd driver failing to suspend will be emitted on the Linux terminal.
mediatek/mt6795: This platform does not build in this release
13.10. 2.2.0 (2019-10-22)
13.10.1. New Features
Architecture
Enable Pointer Authentication (PAuth) support for Secure World
Adds support for ARMv8.3-PAuth in BL1 SMC calls and BL2U image for firmware updates.
Enable Memory Tagging Extension (MTE) support in both secure and non-secure worlds
Adds support for the new Memory Tagging Extension arriving in ARMv8.5. MTE support is now enabled by default on systems that support it at EL0.
To enable it at ELx for both the non-secure and the secure world, the compiler flag
CTX_INCLUDE_MTE_REGS
includes register saving and restoring when necessary in order to prevent information leakage between the worlds.
Add support for Branch Target Identification (BTI)
Build System
Modify FVP makefile for CPUs that support both AArch64/32
AArch32: Allow compiling with soft-float toolchain
Makefile: Add default warning flags
Add Makefile check for PAuth and AArch64
Add compile-time errors for HW_ASSISTED_COHERENCY flag
Apply compile-time check for AArch64-only CPUs
build_macros: Add mechanism to prevent bin generation.
Add support for default stack-protector flag
spd: opteed: Enable NS_TIMER_SWITCH
plat/arm: Skip BL2U if RESET_TO_SP_MIN flag is set
Add new build option to let each platform select which implementation of spinlocks it wants to use
CPU Support
DSU: Workaround for erratum 798953 and 936184
Neoverse N1: Force cacheable atomic to near atomic
Neoverse N1: Workaround for erratum 1073348, 1130799, 1165347, 1207823, 1220197, 1257314, 1262606, 1262888, 1275112, 1315703, 1542419
Neoverse Zeus: Apply the MSR SSBS instruction
cortex-Hercules/HerculesAE: Support added for Cortex-Hercules and Cortex-HerculesAE CPUs
cortex-Hercules/HerculesAE: Enable AMU for Cortex-Hercules and Cortex-HerculesAE
cortex-a76AE: Support added for Cortex-A76AE CPU
cortex-a76: Workaround for erratum 1257314, 1262606, 1262888, 1275112, 1286807
cortex-a65/a65AE: Support added for Cortex-A65 and Cortex-A65AE CPUs
cortex-a65: Enable AMU for Cortex-A65
cortex-a55: Workaround for erratum 1221012
cortex-a35: Workaround for erratum 855472
cortex-a9: Workaround for erratum 794073
Drivers
console: Allow the console to register multiple times
delay: Timeout detection support
gicv3: Enabled multi-socket GIC redistributor frame discovery and migrated ARM platforms to the new API
Adds
gicv3_rdistif_probe
function that delegates the responsibility of discovering the corresponding redistributor base frame to each CPU itself.
sbsa: Add SBSA watchdog driver
st/stm32_hash: Add HASH driver
ti/uart: Add an AArch32 variant
Library at ROM (romlib)
Introduce BTI support in Library at ROM (romlib)
New Platforms Support
amlogic: g12a: New platform support added for the S905X2 (G12A) platform
amlogic: meson/gxl: New platform support added for Amlogic Meson S905x (GXL)
arm/a5ds: New platform support added for A5 DesignStart
arm/corstone: New platform support added for Corstone-700
intel: New platform support added for Agilex
mediatek: New platform support added for MediaTek mt8183
qemu/qemu_sbsa: New platform support added for QEMU SBSA platform
renesas/rcar_gen3: plat: New platform support added for D3
rockchip: New platform support added for px30
rockchip: New platform support added for rk3288
rpi: New platform support added for Raspberry Pi 4
Platforms
arm/common: Introduce wrapper functions to setup secure watchdog
arm/fvp: Add Delay Timer driver to BL1 and BL31 and option for defining platform DRAM2 base
arm/fvp: Add Linux DTS files for 32 bit threaded FVPs
arm/n1sdp: Add code for DDR ECC enablement and BL33 copy to DDR, Initialise CNTFRQ in Non Secure CNTBaseN
arm/juno: Use shared mbedtls heap between BL1 and BL2 and add basic support for dynamic config
imx: Basic support for PicoPi iMX7D, rdc module init, caam module init, aipstz init, IMX_SIP_GET_SOC_INFO, IMX_SIP_BUILDINFO added
intel: Add ncore ccu driver
mediatek/mt81*: Use new bl31_params_parse() helper
nvidia: tegra: Add support for multi console interface
qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1
qemu: Added gicv3 support, new console interface in AArch32, and sub-platforms
renesas/rcar_gen3: plat: Add R-Car V3M support, new board revision for H3ULCB, DBSC4 setting before self-refresh mode
socionext/uniphier: Support console based on multi-console
st: stm32mp1: Add OP-TEE, Avenger96, watchdog, LpDDR3, authentication support and general SYSCFG management
ti/k3: common: Add support for J721E, Use coherent memory for shared data, Trap all asynchronous bus errors to EL3
xilinx/zynqmp: Add support for multi console interface, Initialize IPI table from zynqmp_config_setup()
PSCI
Adding new optional PSCI hook
pwr_domain_on_finish_late
This PSCI hook
pwr_domain_on_finish_late
is similar topwr_domain_on_finish
but is guaranteed to be invoked when the respective core and cluster are participating in coherency.
Security
Speculative Store Bypass Safe (SSBS): Further enhance protection against Spectre variant 4 by disabling speculative loads/stores (SPSR.SSBS bit) by default.
UBSAN support and handlers
Adds support for the Undefined Behaviour sanitizer. There are two types of support offered - minimalistic trapping support which essentially immediately crashes on undefined behaviour and full support with full debug messages.
Tools
cert_create: Add support for bigger RSA key sizes (3KB and 4KB), previously the maximum size was 2KB.
fiptool: Add support to build fiptool on Windows.
13.10.2. Changed
Architecture
Refactor ARMv8.3 Pointer Authentication support code
backtrace: Strip PAC field when PAUTH is enabled
Prettify crash reporting output on AArch64.
Rework smc_unknown return code path in smc_handler
Leverage the existing
el3_exit()
return routine for smc_unknown return path rather than a custom set of instructions.
BL-Specific
Invalidate dcache build option for BL2 entry at EL3
Add missing support for BL2_AT_EL3 in XIP memory
Boot Flow
Add helper to parse BL31 parameters (both versions)
Factor out cross-BL API into export headers suitable for 3rd party code
Introduce lightweight BL platform parameter library
Drivers
auth: Memory optimization for Chain of Trust (CoT) description
bsec: Move bsec_mode_is_closed_device() service to platform
cryptocell: Move Cryptocell specific API into driver
gicv3: Prevent pending G1S interrupt from becoming G0 interrupt
mbedtls: Remove weak heap implementation
mmc: Increase delay between ACMD41 retries
mmc: stm32_sdmmc2: Correctly manage block size
mmc: stm32_sdmmc2: Manage max-frequency property from DT
synopsys/emmc: Do not change FIFO TH as this breaks some platforms
synopsys: Update synopsys drivers to not rely on undefined overflow behaviour
ufs: Extend the delay after reset to wait for some slower chips
Platforms
amlogic/meson/gxl: Remove BL2 dependency from BL31
arm/common: Shorten the Firmware Update (FWU) process
arm/fvp: Remove GIC initialisation from secondary core cold boot
arm/sgm: Temporarily disable shared Mbed TLS heap for SGM
hisilicon: Update hisilicon drivers to not rely on undefined overflow behaviour
imx: imx8: Replace PLAT_IMX8* with PLAT_imx8*, remove duplicated linker symbols and deprecated code include, keep only IRQ 32 unmasked, enable all power domain by default
marvell: Prevent SError accessing PCIe link, Switch to xlat_tables_v2, do not rely on argument passed via smc, make sure that comphy init will use correct address
mediatek: mt8173: Refactor RTC and PMIC drivers
mediatek: mt8173: Apply MULTI_CONSOLE framework
nvidia: Tegra: memctrl_v2: fix “overflow before widen” coverity issue
qemu: Simplify the image size calculation, Move and generalise FDT PSCI fixup, move gicv2 codes to separate file
renesas/rcar_gen3: Convert to multi-console API, update QoS setting, Update IPL and Secure Monitor Rev2.0.4, Change to restore timer counter value at resume, Update DDR setting rev.0.35, qos: change subslot cycle, Change periodic write DQ training option.
rockchip: Allow SOCs with undefined wfe check bits, Streamline and complete UARTn_BASE macros, drop rockchip-specific imported linker symbols for bl31, Disable binary generation for all SOCs, Allow console device to be set by DTB, Use new bl31_params_parse functions
rpi/rpi3: Move shared rpi3 files into common directory
socionext/uniphier: Set CONSOLE_FLAG_TRANSLATE_CRLF and clean up console driver
socionext/uniphier: Replace DIV_ROUND_UP() with div_round_up() from utils_def.h
st/stm32mp: Split stm32mp_io_setup function, move stm32_get_gpio_bank_clock() to private file, correctly handle Clock Spreading Generator, move oscillator functions to generic file, realign device tree files with internal devs, enable RTCAPB clock for dual-core chips, use a common function to check spinlock is available, move check_header() to common code
ti/k3: Enable SEPARATE_CODE_AND_RODATA by default, Remove shared RAM space, Drop _ADDRESS from K3_USART_BASE to match other defines, Remove MSMC port definitions, Allow USE_COHERENT_MEM for K3, Set L2 latency on A72 cores
PSCI
PSCI: Lookup list of parent nodes to lock only once
Secure Partition Manager (SPM): SPCI Prototype
Fix service UUID lookup
Adjust size of virtual address space per partition
Refactor xlat context creation
Move shim layer to TTBR1_EL1
Ignore empty regions in resource description
Security
Refactor SPSR initialisation code
SMMUv3: Abort DMA transactions
For security DMA should be blocked at the SMMU by default unless explicitly enabled for a device. SMMU is disabled after reset with all streams bypassing the SMMU, and abortion of all incoming transactions implements a default deny policy on reset.
Moves
bl1_platform_setup()
function from arm_bl1_setup.c to FVP platforms’ fvp_bl1_setup.c and fvp_ve_bl1_setup.c files.
Tools
cert_create: Remove RSA PKCS#1 v1.5 support
13.10.3. Resolved Issues
Architecture
Fix the CAS spinlock implementation by adding a missing DSB in
spin_unlock()
AArch64: Fix SCTLR bit definitions
Removes incorrect
SCTLR_V_BIT
definition and adds definitions for ARMv8.3-PauthEnIB
,EnDA
andEnDB
bits.
Fix restoration of PAuth context
Replace call to
pauth_context_save()
withpauth_context_restore()
in case of unknown SMC call.
BL-Specific Issues
Fix BL31 crash reporting on AArch64 only platforms
Build System
Remove several warnings reported with W=2 and W=1
Code Quality Issues
SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
Unify type of “cpu_idx” across PSCI module.
Assert if power level value greater then PSCI_INVALID_PWR_LVL
Unsigned long should not be used as per coding guidelines
Reduce the number of memory leaks in cert_create
Fix type of cot_desc_ptr
Use explicit-width data types in AAPCS parameter structs
Add python configuration for editorconfig
BL1: Fix type consistency
Enable -Wshift-overflow=2 to check for undefined shift behavior
Updated upstream platforms to not rely on undefined overflow behaviour
Coverity Quality Issues
Remove GGC ignore -Warray-bounds
Fix Coverity #261967, Infinite loop
Fix Coverity #343017, Missing unlock
Fix Coverity #343008, Side affect in assertion
Fix Coverity #342970, Uninitialized scalar variable
CPU Support
cortex-a12: Fix MIDR mask
Drivers
console: Remove Arm console unregister on suspend
gicv3: Fix support for full SPI range
scmi: Fix wrong payload length
Library Code
libc: Fix sparse warning for __assert()
libc: Fix memchr implementation
Platforms
rpi: rpi3: Fix compilation error when stack protector is enabled
socionext/uniphier: Fix compilation fail for SPM support build config
st/stm32mp1: Fix TZC400 configuration against non-secure DDR
ti/k3: common: Fix RO data area size calculation
Security
AArch32: Disable Secure Cycle Counter
Changes the implementation for disabling Secure Cycle Counter. For ARMv8.5 the counter gets disabled by setting
SDCR.SCCD
bit on CPU cold/warm boot. For the earlier architectures PMCR register is saved/restored on secure world entry/exit from/to Non-secure state, and cycle counting gets disabled by setting PMCR.DP bit.
AArch64: Disable Secure Cycle Counter
For ARMv8.5 the counter gets disabled by setting
MDCR_El3.SCCD
bit on CPU cold/warm boot. For the earlier architectures PMCR_EL0 register is saved/restored on secure world entry/exit from/to Non-secure state, and cycle counting gets disabled by setting PMCR_EL0.DP bit.
13.10.4. Deprecations
Common Code
Remove MULTI_CONSOLE_API flag and references to it
Remove deprecated
plat_crash_console_*
Remove deprecated interfaces
get_afflvl_shift
,mpidr_mask_lower_afflvls
,eret
AARCH32/AARCH64 macros are now deprecated in favor of
__aarch64__
__ASSEMBLY__
macro is now deprecated in favor of__ASSEMBLER__
Drivers
console: Removed legacy console API
console: Remove deprecated finish_console_register
tzc: Remove deprecated types
tzc_action_t
andtzc_region_attributes_t
Secure Partition Manager (SPM):
Prototype SPCI-based SPM (services/std_svc/spm) will be replaced with alternative methods of secure partitioning support.
13.10.5. Known Issues
Build System Issues
dtb: DTB creation not supported when building on a Windows host.
This step in the build process is skipped when running on a Windows host. A known issue from the 1.6 release.
Platform Issues
arm/juno: System suspend from Linux does not function as documented in the user guide
Following the instructions provided in the user guide document does not result in the platform entering system suspend state as expected. A message relating to the hdlcd driver failing to suspend will be emitted on the Linux terminal.
mediatek/mt6795: This platform does not build in this release
13.11. 2.1.0 (2019-03-29)
13.11.1. New Features
Architecture
Support for ARMv8.3 pointer authentication in the normal and secure worlds
The use of pointer authentication in the normal world is enabled whenever architectural support is available, without the need for additional build flags.
Use of pointer authentication in the secure world remains an experimental configuration at this time. Using both the
ENABLE_PAUTH
andCTX_INCLUDE_PAUTH_REGS
build flags, pointer authentication can be enabled in EL3 and S-EL1/0.See the Firmware Design document for additional details on the use of pointer authentication.
Enable Data Independent Timing (DIT) in EL3, where supported
Build System
Support for BL-specific build flags
Support setting compiler target architecture based on
ARM_ARCH_MINOR
build option.New
RECLAIM_INIT_CODE
build flag:A significant amount of the code used for the initialization of BL31 is not needed again after boot time. In order to reduce the runtime memory footprint, the memory used for this code can be reclaimed after initialization.
Certain boot-time functions were marked with the
__init
attribute to enable this reclamation.
CPU Support
cortex-a76: Workaround for erratum 1073348
cortex-a76: Workaround for erratum 1220197
cortex-a76: Workaround for erratum 1130799
cortex-a75: Workaround for erratum 790748
cortex-a75: Workaround for erratum 764081
cortex-a73: Workaround for erratum 852427
cortex-a73: Workaround for erratum 855423
cortex-a57: Workaround for erratum 817169
cortex-a57: Workaround for erratum 814670
cortex-a55: Workaround for erratum 903758
cortex-a55: Workaround for erratum 846532
cortex-a55: Workaround for erratum 798797
cortex-a55: Workaround for erratum 778703
cortex-a55: Workaround for erratum 768277
cortex-a53: Workaround for erratum 819472
cortex-a53: Workaround for erratum 824069
cortex-a53: Workaround for erratum 827319
cortex-a17: Workaround for erratum 852423
cortex-a17: Workaround for erratum 852421
cortex-a15: Workaround for erratum 816470
cortex-a15: Workaround for erratum 827671
Documentation
Exception Handling Framework documentation
Library at ROM (romlib) documentation
RAS framework documentation
Coding Guidelines document
Drivers
ccn: Add API for setting and reading node registers
Adds
ccn_read_node_reg
functionAdds
ccn_write_node_reg
function
partition: Support MBR partition entries
scmi: Add
plat_css_get_scmi_info
functionAdds a new API
plat_css_get_scmi_info
which lets the platform register a platform-specific instance ofscmi_channel_plat_info_t
and remove the default valuestzc380: Add TZC-380 TrustZone Controller driver
tzc-dmc620: Add driver to manage the TrustZone Controller within the DMC-620 Dynamic Memory Controller
Library at ROM (romlib)
Add platform-specific jump table list
Allow patching of romlib functions
This change allows patching of functions in the romlib. This can be done by adding “patch” at the end of the jump table entry for the function that needs to be patched in the file jmptbl.i.
Library Code
Support non-LPAE-enabled MMU tables in AArch32
mmio: Add
mmio_clrsetbits_16
function16-bit variant of
mmio_clrsetbits
object_pool: Add Object Pool Allocator
Manages object allocation using a fixed-size static array
Adds
pool_alloc
andpool_alloc_n
functionsDoes not provide any functions to free allocated objects (by design)
libc: Added
strlcpy
functionlibc: Import
strrchr
function from FreeBSDxlat_tables: Add support for ARMv8.4-TTST
xlat_tables: Support mapping regions without an explicitly specified VA
Math
Added softudiv macro to support software division
Memory Partitioning And Monitoring (MPAM)
Enabled MPAM EL2 traps (
MPAMHCR_EL2
andMPAM_EL2
)
Platforms
amlogic: Add support for Meson S905 (GXBB)
arm/fvp_ve: Add support for FVP Versatile Express platform
arm/n1sdp: Add support for Neoverse N1 System Development platform
arm/rde1edge: Add support for Neoverse E1 platform
arm/rdn1edge: Add support for Neoverse N1 platform
arm: Add support for booting directly to Linux without an intermediate loader (AArch32)
arm/juno: Enable new CPU errata workarounds for A53 and A57
arm/juno: Add romlib support
Building a combined BL1 and ROMLIB binary file with the correct page alignment is now supported on the Juno platform. When
USE_ROMLIB
is set for Juno, it generates the combined filebl1_romlib.bin
which needs to be used instead of bl1.bin.intel/stratix: Add support for Intel Stratix 10 SoC FPGA platform
marvell: Add support for Armada-37xx SoC platform
nxp: Add support for i.MX8M and i.MX7 Warp7 platforms
renesas: Add support for R-Car Gen3 platform
xilinx: Add support for Versal ACAP platforms
Position-Independent Executable (PIE)
PIE support has initially been added to BL31. The
ENABLE_PIE
build flag is used to enable or disable this functionality as required.Secure Partition Manager
New SPM implementation based on SPCI Alpha 1 draft specification
A new version of SPM has been implemented, based on the SPCI (Secure Partition Client Interface) and SPRT (Secure Partition Runtime) draft specifications.
The new implementation is a prototype that is expected to undergo intensive rework as the specifications change. It has basic support for multiple Secure Partitions and Resource Descriptions.
The older version of SPM, based on MM (ARM Management Mode Interface Specification), is still present in the codebase. A new build flag,
SPM_MM
has been added to allow selection of the desired implementation. This flag defaults to 1, selecting the MM-based implementation.
Security
Spectre Variant-1 mitigations (
CVE-2017-5753
)Use Speculation Store Bypass Safe (SSBS) functionality where available
Provides mitigation against
CVE-2018-19440
(Not saving x0 to x3 registers can leak information from one Normal World SMC client to another)
13.11.2. Changed
Build System
Warning levels are now selectable with
W=<1,2,3>
Removed unneeded include paths in PLAT_INCLUDES
“Warnings as errors” (Werror) can be disabled using
E=0
Support totally quiet output with
-s
flagSupport passing options to checkpatch using
CHECKPATCH_OPTS=<opts>
Invoke host compiler with
HOSTCC / HOSTCCFLAGS
instead ofCC / CFLAGS
Make device tree pre-processing similar to U-boot/Linux by:
Creating separate
CPPFLAGS
for DT preprocessing so that compiler options specific to it can be accommodated.Replacing
CPP
withPP
for DT pre-processing
CPU Support
Errata report function definition is now mandatory for CPU support files
CPU operation files must now define a
<name>_errata_report
function to print errata status. This is no longer a weak reference.
Documentation
Migrated some content from GitHub wiki to
docs/
directorySecurity advisories now have CVE links
Updated copyright guidelines
Drivers
console: The
MULTI_CONSOLE_API
framework has been rewritten in Cconsole: Ported multi-console driver to AArch32
gic: Remove ‘lowest priority’ constants
Removed
GIC_LOWEST_SEC_PRIORITY
andGIC_LOWEST_NS_PRIORITY
. Platforms should define these if required, or instead determine the correct priority values at runtime.delay_timer: Check that the Generic Timer extension is present
mmc: Increase command reply timeout to 10 milliseconds
mmc: Poll eMMC device status to ensure
EXT_CSD
command completionmmc: Correctly check return code from
mmc_fill_device_info
External Libraries
libfdt: Upgraded from 1.4.2 to 1.4.6-9
mbed TLS: Upgraded from 2.12 to 2.16
This change incorporates fixes for security issues that should be reviewed to determine if they are relevant for software implementations using Trusted Firmware-A. See the mbed TLS releases page for details on changes from the 2.12 to the 2.16 release.
Library Code
compiler-rt: Updated
lshrdi3.c
andint_lib.h
with changes from LLVM master branch (r345645)cpu: Updated macro that checks need for
CVE-2017-5715
mitigationlibc: Made setjmp and longjmp C standard compliant
libc: Allowed overriding the default libc (use
OVERRIDE_LIBC
)libc: Moved setjmp and longjmp to the
libc/
directory
Platforms
Removed Mbed TLS dependency from plat_bl_common.c
arm: Removed unused
ARM_MAP_BL_ROMLIB
macroarm: Removed
ARM_BOARD_OPTIMISE_MEM
feature and build flagarm: Moved several components into
drivers/
directoryThis affects the SDS, SCP, SCPI, MHU and SCMI components
arm/juno: Increased maximum BL2 image size to
0xF000
This change was required to accommodate a larger
libfdt
library
SCMI
Optimized bakery locks when hardware-assisted coherency is enabled using the
HW_ASSISTED_COHERENCY
build flag
SDEI
Added support for unconditionally resuming secure world execution after {{ SDEI }} event processing completes
{{ SDEI }} interrupts, although targeting EL3, occur on behalf of the non-secure world, and may have higher priority than secure world interrupts. Therefore they might preempt secure execution and yield execution to the non-secure {{ SDEI }} handler. Upon completion of {{ SDEI }} event handling, resume secure execution if it was preempted.
Translation Tables (XLAT)
Dynamically detect need for
Common not Private (TTBRn_ELx.CnP)
bitProperly handle the case where
ARMv8.2-TTCNP
is implemented in a CPU that does not implement all mandatory v8.2 features (and so must claim to implement a lower architecture version).
13.11.3. Resolved Issues
Architecture
Incorrect check for SSBS feature detection
Unintentional register clobber in AArch32 reset_handler function
Build System
Dependency issue during DTB image build
Incorrect variable expansion in Arm platform makefiles
Building on Windows with verbose mode (
V=1
) enabled is brokenAArch32 compilation flags is missing
$(march32-directive)
BL-Specific Issues
bl2:
uintptr_t is not defined
error whenBL2_IN_XIP_MEM
is definedbl2: Missing prototype warning in
bl2_arch_setup
bl31: Omission of Global Offset Table (GOT) section
Code Quality Issues
Multiple MISRA compliance issues
Potential NULL pointer dereference (Coverity-detected)
Drivers
mmc: Local declaration of
scr
variable causes a cache issue when invalidating after the read DMA transfer completesmmc:
ACMD41
does not send voltage information during initialization, resulting in the command being treated as a query. This prevents the command from initializing the controller.mmc: When checking device state using
mmc_device_state()
there are no retries attempted in the event of an errorccn: Incorrect Region ID calculation for RN-I nodes
console:
Fix MULTI_CONSOLE_API
when used as a crash consolepartition: Improper NULL checking in gpt.c
partition: Compilation failure in
VERBOSE
mode (V=1
)
Library Code
common: Incorrect check for Address Authentication support
xlat: Fix XLAT_V1 / XLAT_V2 incompatibility
The file
arm_xlat_tables.h
has been renamed toxlat_tables_compat.h
and has been moved to a common folder. This header can be used to guarantee compatibility, as it includes the correct header based onXLAT_TABLES_LIB_V2
.xlat: armclang unused-function warning on
xlat_clean_dcache_range
xlat: Invalid
mm_cursor
checks inmmap_add
andmmap_add_ctx
sdei: Missing
context.h
header
Platforms
common: Missing prototype warning for
plat_log_get_prefix
arm: Insufficient maximum BL33 image size
arm: Potential memory corruption during BL2-BL31 transition
On Arm platforms, the BL2 memory can be overlaid by BL31/BL32. The memory descriptors describing the list of executable images are created in BL2 R/W memory, which could be possibly corrupted later on by BL31/BL32 due to overlay. This patch creates a reserved location in SRAM for these descriptors and are copied over by BL2 before handing over to next BL image.
juno: Invalid behaviour when
CSS_USE_SCMI_SDS_DRIVER
is not setIn
juno_pm.c
thecss_scmi_override_pm_ops
function was used regardless of whether the build flag was set. The original behaviour has been restored in the case where the build flag is not set.
Tools
fiptool: Incorrect UUID parsing of blob parameters
doimage: Incorrect object rules in Makefile
13.11.4. Deprecations
Common Code
plat_crash_console_init
functionplat_crash_console_putc
functionplat_crash_console_flush
functionfinish_console_register
macro
AArch64-specific Code
helpers:
get_afflvl_shift
helpers:
mpidr_mask_lower_afflvls
helpers:
eret
Secure Partition Manager (SPM)
Boot-info structure
13.11.5. Known Issues
Build System Issues
dtb: DTB creation not supported when building on a Windows host.
This step in the build process is skipped when running on a Windows host. A known issue from the 1.6 release.
Platform Issues
arm/juno: System suspend from Linux does not function as documented in the user guide
Following the instructions provided in the user guide document does not result in the platform entering system suspend state as expected. A message relating to the hdlcd driver failing to suspend will be emitted on the Linux terminal.
arm/juno: The firmware update use-cases do not work with motherboard firmware version < v1.5.0 (the reset reason is not preserved). The Linaro 18.04 release has MB v1.4.9. The MB v1.5.0 is available in Linaro 18.10 release.
mediatek/mt6795: This platform does not build in this release
13.12. 2.0.0 (2018-10-02)
13.12.1. New Features
Removal of a number of deprecated APIs
A new Platform Compatibility Policy document has been created which references a wiki page that maintains a listing of deprecated interfaces and the release after which they will be removed.
All deprecated interfaces except the MULTI_CONSOLE_API have been removed from the code base.
Various Arm and partner platforms have been updated to remove the use of removed APIs in this release.
This release is otherwise unchanged from 1.6 release
13.12.2. Issues resolved since last release
No issues known at 1.6 release resolved in 2.0 release
13.12.3. Known Issues
DTB creation not supported when building on a Windows host. This step in the build process is skipped when running on a Windows host. Known issue from 1.6 version.
As a result of removal of deprecated interfaces the Nvidia Tegra, Marvell Armada 8K and MediaTek MT6795 platforms do not build in this release. Also MediaTek MT8173, NXP QorIQ LS1043A, NXP i.MX8QX, NXP i.MX8QMa, Rockchip RK3328, Rockchip RK3368 and Rockchip RK3399 platforms have not been confirmed to be working after the removal of the deprecated interfaces although they do build.
13.13. 1.6.0 (2018-09-21)
13.13.1. New Features
Addressing Speculation Security Vulnerabilities
Implement static workaround for CVE-2018-3639 for AArch32 and AArch64
Add support for dynamic mitigation for CVE-2018-3639
Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76
Ensure {{ SDEI }} handler executes with CVE-2018-3639 mitigation enabled
Introduce RAS handling on AArch64
Some RAS extensions are mandatory for Armv8.2 CPUs, with others mandatory for Armv8.4 CPUs however, all extensions are also optional extensions to the base Armv8.0 architecture.
The Armv8 RAS Extensions introduced Standard Error Records which are a set of standard registers to configure RAS node policy and allow RAS Nodes to record and expose error information for error handling agents.
Capabilities are provided to support RAS Node enumeration and iteration along with individual interrupt registrations and fault injections support.
Introduce handlers for Uncontainable errors, Double Faults and EL3 External Aborts
Enable Memory Partitioning And Monitoring (MPAM) for lower EL’s
Memory Partitioning And Monitoring is an Armv8.4 feature that enables various memory system components and resources to define partitions. Software running at various ELs can then assign themselves to the desired partition to control their performance aspects.
When ENABLE_MPAM_FOR_LOWER_ELS is set to 1, EL3 allows lower ELs to access their own MPAM registers without trapping to EL3. This patch however, doesn’t make use of partitioning in EL3; platform initialisation code should configure and use partitions in EL3 if required.
Introduce ROM Lib Feature
Support combining several libraries into a self-called “romlib” image, that may be shared across images to reduce memory footprint. The romlib image is stored in ROM but is accessed through a jump-table that may be stored in read-write memory, allowing for the library code to be patched.
Introduce Backtrace Feature
This function displays the backtrace, the current EL and security state to allow a post-processing tool to choose the right binary to interpret the dump.
Print backtrace in assert() and panic() to the console.
Code hygiene changes and alignment with MISRA C-2012 guideline with fixes addressing issues complying to the following rules:
MISRA rules 4.9, 5.1, 5.3, 5.7, 8.2-8.5, 8.8, 8.13, 9.3, 10.1, 10.3-10.4, 10.8, 11.3, 11.6, 12.1, 14.4, 15.7, 16.1-16.7, 17.7-17.8, 20.7, 20.10, 20.12, 21.1, 21.15, 22.7
Clean up the usage of void pointers to access symbols
Increase usage of static qualifier to locally used functions and data
Migrated to use of u_register_t for register read/write to better match AArch32 and AArch64 type sizes
Use int-ll64 for both AArch32 and AArch64 to assist in consistent format strings between architectures
Clean up TF-A libc by removing non arm copyrighted implementations and replacing them with modified FreeBSD and SCC implementations
Various changes to support Clang linker and assembler
The clang assembler/preprocessor is used when Clang is selected. However, the clang linker is not used because it is unable to link TF-A objects due to immaturity of clang linker functionality at this time.
Refactor support APIs into Libraries
Evolve libfdt, mbed TLS library and standard C library sources as proper libraries that TF-A may be linked against.
CPU Enhancements
Add CPU support for Cortex-Ares and Cortex-A76
Add AMU support for Cortex-Ares
Add initial CPU support for Cortex-Deimos
Add initial CPU support for Cortex-Helios
Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76
Implement Cortex-Ares erratum 1043202 workaround
Implement DSU erratum 936184 workaround
Check presence of fix for errata 843419 in Cortex-A53
Check presence of fix for errata 835769 in Cortex-A53
Translation Tables Enhancements
The xlat v2 library has been refactored in order to be reused by different TF components at different EL’s including the addition of EL2. Some refactoring to make the code more generic and less specific to TF, in order to reuse the library outside of this project.
SPM Enhancements
General cleanups and refactoring to pave the way to multiple partitions support
SDEI Enhancements
Allow platforms to define explicit events
Determine client EL from NS context’s SCR_EL3
Make dispatches synchronous
Introduce jump primitives for BL31
Mask events after CPU wakeup in {{ SDEI }} dispatcher to conform to the specification
Misc TF-A Core Common Code Enhancements
Add support for eXecute In Place (XIP) memory in BL2
Add support for the SMC Calling Convention 2.0
Introduce External Abort handling on AArch64 External Abort routed to EL3 was reported as an unhandled exception and caused a panic. This change enables Trusted Firmware-A to handle External Aborts routed to EL3.
Save value of ACTLR_EL1 implementation-defined register in the CPU context structure rather than forcing it to 0.
Introduce ARM_LINUX_KERNEL_AS_BL33 build option, which allows BL31 to directly jump to a Linux kernel. This makes for a quicker and simpler boot flow, which might be useful in some test environments.
Add dynamic configurations for BL31, BL32 and BL33 enabling support for Chain of Trust (COT).
Make TF UUID RFC 4122 compliant
New Platform Support
Arm SGI-575
Arm SGM-775
Allwinner sun50i_64
Allwinner sun50i_h6
NXP QorIQ LS1043A
NXP i.MX8QX
NXP i.MX8QM
NXP i.MX7Solo WaRP7
TI K3
Socionext Synquacer SC2A11
Marvell Armada 8K
STMicroelectronics STM32MP1
Misc Generic Platform Common Code Enhancements
Add MMC framework that supports both eMMC and SD card devices
Misc Arm Platform Common Code Enhancements
Demonstrate PSCI MEM_PROTECT from el3_runtime
Provide RAS support
Migrate AArch64 port to the multi console driver. The old API is deprecated and will eventually be removed.
Move BL31 below BL2 to enable BL2 overlay resulting in changes in the layout of BL images in memory to enable more efficient use of available space.
Add cpp build processing for dtb that allows processing device tree with external includes.
Extend FIP io driver to support multiple FIP devices
Add support for SCMI AP core configuration protocol v1.0
Use SCMI AP core protocol to set the warm boot entrypoint
Add support to Mbed TLS drivers for shared heap among different BL images to help optimise memory usage
Enable non-secure access to UART1 through a build option to support a serial debug port for debugger connection
Enhancements for Arm Juno Platform
Add support for TrustZone Media Protection 1 (TZMP1)
Enhancements for Arm FVP Platform
Dynamic_config: remove the FVP dtb files
Set DYNAMIC_WORKAROUND_CVE_2018_3639=1 on FVP by default
Set the ability to dynamically disable Trusted Boot Board authentication to be off by default with DYN_DISABLE_AUTH
Add librom enhancement support in FVP
Support shared Mbed TLS heap between BL1 and BL2 that allow a reduction in BL2 size for FVP
Enhancements for Arm SGI/SGM Platform
Enable ARM_PLAT_MT flag for SGI-575
Add dts files to enable support for dynamic config
Add RAS support
Support shared Mbed TLS heap for SGI and SGM between BL1 and BL2
Enhancements for Non Arm Platforms
Raspberry Pi Platform
Hikey Platforms
Xilinx Platforms
QEMU Platform
Rockchip rk3399 Platform
TI Platforms
Socionext Platforms
Allwinner Platforms
NXP Platforms
NVIDIA Tegra Platform
Marvell Platforms
STMicroelectronics STM32MP1 Platform
13.13.2. Issues resolved since last release
No issues known at 1.5 release resolved in 1.6 release
13.13.3. Known Issues
DTB creation not supported when building on a Windows host. This step in the build process is skipped when running on a Windows host. Known issue from 1.5 version.
13.14. 1.5.0 (2018-03-20)
13.14.1. New features
Added new firmware support to enable RAS (Reliability, Availability, and Serviceability) functionality.
Secure Partition Manager (SPM): A Secure Partition is a software execution environment instantiated in S-EL0 that can be used to implement simple management and security services. The SPM is the firmware component that is responsible for managing a Secure Partition.
SDEI dispatcher: Support for interrupt-based {{ SDEI }} events and all interfaces as defined by the {{ SDEI }} specification v1.0, see SDEI Specification
Exception Handling Framework (EHF): Framework that allows dispatching of EL3 interrupts to their registered handlers which are registered based on their priorities. Facilitates firmware-first error handling policy where asynchronous exceptions may be routed to EL3.
Integrated the TSPD with EHF.
Updated PSCI support:
Implemented PSCI v1.1 optional features
MEM_PROTECT
andSYSTEM_RESET2
. The supported PSCI version was updated to v1.1.Improved PSCI STAT timestamp collection, including moving accounting for retention states to be inside the locks and fixing handling of wrap-around when calculating residency in AArch32 execution state.
Added optional handler for early suspend that executes when suspending to a power-down state and with data caches enabled.
This may provide a performance improvement on platforms where it is safe to perform some or all of the platform actions from
pwr_domain_suspend
with the data caches enabled.
Enabled build option, BL2_AT_EL3, for BL2 to allow execution at EL3 without any dependency on TF BL1.
This allows platforms which already have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL stages without need for BL1. This was not previously possible because BL2 executes at S-EL1 and cannot jump straight to EL3.
Implemented support for SMCCC v1.1, including
SMCCC_VERSION
andSMCCC_ARCH_FEATURES
.Additionally, added support for
SMCCC_VERSION
in PSCI features to enable discovery of the SMCCC version via PSCI feature call.Added Dynamic Configuration framework which enables each of the boot loader stages to be dynamically configured at runtime if required by the platform. The boot loader stage may optionally specify a firmware configuration file and/or hardware configuration file that can then be shared with the next boot loader stage.
Introduced a new BL handover interface that essentially allows passing of 4 arguments between the different BL stages.
Updated cert_create and fip_tool to support the dynamic configuration files. The COT also updated to support these new files.
Code hygiene changes and alignment with MISRA guideline:
Fix use of undefined macros.
Achieved compliance with Mandatory MISRA coding rules.
Achieved compliance for following Required MISRA rules for the default build configurations on FVP and Juno platforms : 7.3, 8.3, 8.4, 8.5 and 8.8.
Added support for Armv8.2-A architectural features:
Updated translation table set-up to set the CnP (Common not Private) bit for secure page tables so that multiple PEs in the same Inner Shareable domain can use the same translation table entries for a given stage of translation in a particular translation regime.
Extended the supported values of ID_AA64MMFR0_EL1.PARange to include the 52-bit Physical Address range.
Added support for the Scalable Vector Extension to allow Normal world software to access SVE functionality but disable access to SVE, SIMD and floating point functionality from the Secure world in order to prevent corruption of the Z-registers.
Added support for Armv8.4-A architectural feature Activity Monitor Unit (AMU)
extensions.
In addition to the v8.4 architectural extension, AMU support on Cortex-A75 was implemented.
Enhanced OP-TEE support to enable use of pageable OP-TEE image. The Arm standard platforms are updated to load up to 3 images for OP-TEE; header, pager image and paged image.
The chain of trust is extended to support the additional images.
Enhancements to the translation table library:
Introduced APIs to get and set the memory attributes of a region.
Added support to manage both privilege levels in translation regimes that describe translations for 2 Exception levels, specifically the EL1&0 translation regime, and extended the memory map region attributes to include specifying Non-privileged access.
Added support to specify the granularity of the mappings of each region, for instance a 2MB region can be specified to be mapped with 4KB page tables instead of a 2MB block.
Disabled the higher VA range to avoid unpredictable behaviour if there is an attempt to access addresses in the higher VA range.
Added helpers for Device and Normal memory MAIR encodings that align with the Arm Architecture Reference Manual for Armv8-A (Arm DDI0487B.b).
Code hygiene including fixing type length and signedness of constants, refactoring of function to enable the MMU, removing all instances where the virtual address space is hardcoded and added comments that document alignment needed between memory attributes and attributes specified in TCR_ELx.
Updated GIC support:
Introduce new APIs for GICv2 and GICv3 that provide the capability to specify interrupt properties rather than list of interrupt numbers alone. The Arm platforms and other upstream platforms are migrated to use interrupt properties.
Added helpers to save / restore the GICv3 context, specifically the Distributor and Redistributor contexts and architectural parts of the ITS power management. The Distributor and Redistributor helpers also support the implementation-defined part of GIC-500 and GIC-600.
Updated the Arm FVP platform to save / restore the GICv3 context on system suspend / resume as an example of how to use the helpers.
Introduced a new TZC secured DDR carve-out for use by Arm platforms for storing EL3 runtime data such as the GICv3 register context.
Added support for Armv7-A architecture via build option ARM_ARCH_MAJOR=7. This includes following features:
Updates GICv2 driver to manage GICv1 with security extensions.
Software implementation for 32bit division.
Enabled use of generic timer for platforms that do not set ARM_CORTEX_Ax=yes.
Support for Armv7-A Virtualization extensions [DDI0406C_C].
Support for both Armv7-A platforms that only have 32-bit addressing and Armv7-A platforms that support large page addressing.
Included support for following Armv7 CPUs: Cortex-A12, Cortex-A17, Cortex-A7, Cortex-A5, Cortex-A9, Cortex-A15.
Added support in QEMU for Armv7-A/Cortex-A15.
Enhancements to Firmware Update feature:
Updated the FWU documentation to describe the additional images needed for Firmware update, and how they are used for both the Juno platform and the Arm FVP platforms.
Enhancements to Trusted Board Boot feature:
Added support to cert_create tool for RSA PKCS1# v1.5 and SHA384, SHA512 and SHA256.
For Arm platforms added support to use ECDSA keys.
Enhanced the mbed TLS wrapper layer to include support for both RSA and ECDSA to enable runtime selection between RSA and ECDSA keys.
Added support for secure interrupt handling in AArch32 sp_min, hardcoded to only handle FIQs.
Added support to allow a platform to load images from multiple boot sources, for example from a second flash drive.
Added a logging framework that allows platforms to reduce the logging level at runtime and additionally the prefix string can be defined by the platform.
Further improvements to register initialisation:
Control register PMCR_EL0 / PMCR is set to prohibit cycle counting in the secure world. This register is added to the list of registers that are saved and restored during world switch.
When EL3 is running in AArch32 execution state, the Non-secure version of SCTLR is explicitly initialised during the warmboot flow rather than relying on the hardware to set the correct reset values.
Enhanced support for Arm platforms:
Introduced driver for Shared-Data-Structure (SDS) framework which is used for communication between SCP and the AP CPU, replacing Boot-Over_MHU (BOM) protocol.
The Juno platform is migrated to use SDS with the SCMI support added in v1.3 and is set as default.
The driver can be found in the plat/arm/css/drivers folder.
Improved memory usage by only mapping TSP memory region when the TSPD has been included in the build. This reduces the memory footprint and avoids unnecessary memory being mapped.
Updated support for multi-threading CPUs for FVP platforms - always check the MT field in MPDIR and access the bit fields accordingly.
Support building for platforms that model DynamIQ configuration by implementing all CPUs in a single cluster.
Improved nor flash driver, for instance clearing status registers before sending commands. Driver can be found plat/arm/board/common folder.
Enhancements to QEMU platform:
Added support for TBB.
Added support for using OP-TEE pageable image.
Added support for LOAD_IMAGE_V2.
Migrated to use translation table library v2 by default.
Added support for SEPARATE_CODE_AND_RODATA.
Applied workarounds CVE-2017-5715 on Arm Cortex-A57, -A72, -A73 and -A75, and for Armv7-A CPUs Cortex-A9, -A15 and -A17.
Applied errata workaround for Arm Cortex-A57: 859972.
Applied errata workaround for Arm Cortex-A72: 859971.
Added support for Poplar 96Board platform.
Added support for Raspberry Pi 3 platform.
Added Call Frame Information (CFI) assembler directives to the vector entries which enables debuggers to display the backtrace of functions that triggered a synchronous abort.
Added ability to build dtb.
Added support for pre-tool (cert_create and fiptool) image processing enabling compression of the im