34. STMicroelectronics STM32MP1

STM32MP1 is a microprocessor designed by STMicroelectronics based on Arm Cortex-A7. It is an Armv7-A platform, using dedicated code from TF-A. More information can be found on STM32MP1 Series page.

34.1. STM32MP1 Versions

There are 2 variants for STM32MP1: STM32MP13 and STM32MP15

34.1.1. STM32MP13 Versions

The STM32MP13 series is available in 3 different lines which are pin-to-pin compatible:

  • STM32MP131: Single Cortex-A7 core

  • STM32MP133: STM32MP131 + 2*CAN, ETH2(GMAC), ADC1

  • STM32MP135: STM32MP133 + DCMIPP, LTDC

Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:

  • A Cortex-A7 @ 650 MHz

  • C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz

  • D Cortex-A7 @ 900 MHz

  • F Secure Boot + HW Crypto + Cortex-A7 @ 900 MHz

34.1.2. STM32MP15 Versions

The STM32MP15 series is available in 3 different lines which are pin-to-pin compatible:

  • STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD

  • STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD

  • STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz

Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:

  • A Basic + Cortex-A7 @ 650 MHz

  • C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz

  • D Basic + Cortex-A7 @ 800 MHz

  • F Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz

The STM32MP1 part number codification page gives more information about part numbers.

34.2. Design

The STM32MP1 resets in the ROM code of the Cortex-A7. The primary boot core (core 0) executes the boot sequence while secondary boot core (core 1) is kept in a holding pen loop. The ROM code boot sequence loads the TF-A binary image from boot device to embedded SRAM.

The TF-A image must be properly formatted with a STM32 header structure for ROM code is able to load this image. Tool stm32image can be used to prepend this header to the generated TF-A binary.

34.2.1. Boot with FIP

The use of FIP is now the recommended way to boot STM32MP1 platform. Only BL2 (with STM32 header) is loaded by ROM code. The other binaries are inside the FIP binary: BL32 (SP_min or OP-TEE), U-Boot and their respective device tree blobs.

34.2.2. STM32IMAGE bootchain

Although still supported, this way of booting is not recommended. Pease use FIP instead. At compilation step, BL2, BL32 and DTB file are linked together in a single binary. The stm32image tool is also generated and the header is added to TF-A binary. This binary file with header is named tf-a-stm32mp157c-ev1.stm32. It can then be copied in the first partition of the boot device.

34.2.3. Memory mapping

0x00000000 +-----------------+
           |                 |   ROM
0x00020000 +-----------------+
           |                 |
           |       ...       |
           |                 |
0x2FFC0000 +-----------------+ \
           |     BL32 DTB    | |
0x2FFC5000 +-----------------+ |
           |       BL32      | |
0x2FFDF000 +-----------------+ |
           |       ...       | |
0x2FFE3000 +-----------------+ |
           |     BL2 DTB     | | Embedded SRAM
0x2FFEA000 +-----------------+ |
           |       BL2       | |
0x2FFFF000 +-----------------+ |
           |  SCMI mailbox   | |
0x30000000 +-----------------+ /
           |                 |
           |       ...       |
           |                 |
0x40000000 +-----------------+
           |                 |
           |                 |   Devices
           |                 |
0xC0000000 +-----------------+ \
           |                 | |
0xC0100000 +-----------------+ |
           |       BL33      | | Non-secure RAM (DDR)
           |       ...       | |
           |                 | |
0xFFFFFFFF +-----------------+ /

34.2.4. Boot sequence

ROM code -> BL2 (compiled with BL2_AT_EL3) -> BL32 (SP_min) -> BL33 (U-Boot)

or if Op-TEE is used:

ROM code -> BL2 (compiled with BL2_AT_EL3) -> OP-TEE -> BL33 (U-Boot)

34.3. Build Instructions

Boot media(s) supported by BL2 must be specified in the build command. Available storage medias are:

  • STM32MP_SDMMC

  • STM32MP_EMMC

  • STM32MP_RAW_NAND

  • STM32MP_SPI_NAND

  • STM32MP_SPI_NOR

Serial boot devices:

  • STM32MP_UART_PROGRAMMER

  • STM32MP_USB_PROGRAMMER

Other configuration flags:

  • DTB_FILE_NAME: to precise board device-tree blob to be used.
    Default: stm32mp157c-ev1.dtb
  • STM32MP_EARLY_CONSOLE: to enable early traces before clock driver is setup.
    Default: 0 (disabled)
  • STM32MP_UART_BAUDRATE: to select UART baud rate.
    Default: 115200
  • STM32_TF_VERSION: to manage BL2 monotonic counter.
    Default: 0
  • STM32MP13: to select STM32MP13 variant configuration.
    Default: 0
  • STM32MP15: to select STM32MP15 variant configuration.
    Default: 1

34.3.1. Boot with FIP

You need to build BL2, BL32 (SP_min or OP-TEE) and BL33 (U-Boot) before building FIP binary.

34.3.1.1. U-Boot

cd <u-boot_directory>
make stm32mp15_trusted_defconfig
make DEVICE_TREE=stm32mp157c-ev1 all

34.3.1.2. OP-TEE (optional)

cd <optee_directory>
make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 \
    CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts

34.3.1.3. TF-A BL32 (SP_min)

If you choose not to use OP-TEE, you can use TF-A SP_min. To build TF-A BL32, and its device tree file:

make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
    AARCH32_SP=sp_min DTB_FILE_NAME=stm32mp157c-ev1.dtb bl32 dtbs

34.3.1.4. TF-A BL2

To build TF-A BL2 with its STM32 header for SD-card boot:

make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
    DTB_FILE_NAME=stm32mp157c-ev1.dtb STM32MP_SDMMC=1

For other boot devices, you have to replace STM32MP_SDMMC in the previous command with the desired device flag.

This BL2 is independent of the BL32 used (SP_min or OP-TEE)

34.3.1.5. FIP

With BL32 SP_min:

make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
    AARCH32_SP=sp_min \
    DTB_FILE_NAME=stm32mp157c-ev1.dtb \
    BL33=<u-boot_directory>/u-boot-nodtb.bin \
    BL33_CFG=<u-boot_directory>/u-boot.dtb \
    fip

With OP-TEE:

make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
    AARCH32_SP=optee \
    DTB_FILE_NAME=stm32mp157c-ev1.dtb \
    BL33=<u-boot_directory>/u-boot-nodtb.bin \
    BL33_CFG=<u-boot_directory>/u-boot.dtb \
    BL32=<optee_directory>/tee-header_v2.bin \
    BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin
    BL32_EXTRA2=<optee_directory>/tee-pageable_v2.bin
    fip

34.3.2. STM32IMAGE bootchain

You need to add the following flag to the make command: STM32MP_USE_STM32IMAGE=1

To build with SP_min and support for SD-card boot:

make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
    AARCH32_SP=sp_min STM32MP_SDMMC=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb \
    STM32MP_USE_STM32IMAGE=1

cd <u-boot_directory>
make stm32mp15_trusted_defconfig
make DEVICE_TREE=stm32mp157c-ev1 all

To build TF-A with OP-TEE support for SD-card boot:

make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
    AARCH32_SP=optee STM32MP_SDMMC=1 DTB_FILE_NAME=stm32mp157c-ev1.dtb \
    STM32MP_USE_STM32IMAGE=1

cd <optee_directory>
make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 \
    CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts

cd <u-boot_directory>
make stm32mp15_trusted_defconfig
make DEVICE_TREE=stm32mp157c-ev1 all

The following build options are supported:

  • ENABLE_STACK_PROTECTOR: To enable the stack protection.

34.4. Populate SD-card

34.4.1. Boot with FIP

The SD-card has to be formatted with GPT. It should contain at least those partitions:

  • fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary (BL2)

  • fip: which contains the FIP binary

Usually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl.

34.4.2. STM32IMAGE bootchain

The SD-card has to be formatted with GPT. It should contain at least those partitions:

  • fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary

  • ssbl: to copy the u-boot.stm32 binary

Usually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl.

OP-TEE artifacts go into separate partitions as follows:

  • teeh: tee-header_v2.stm32

  • teed: tee-pageable_v2.stm32

  • teex: tee-pager_v2.stm32