8.3. Runtime Instrumentation Testing - N1SDP
For this test we used the N1 System Development Platform (N1SDP), which contains an SoC consisting of two dual-core Arm N1 clusters.
The following source trees were used:
Please see the Runtime Instrumentation Testing Methodology page for more details. The tests were ran using the tf-psci-lava-instr/n1sdp-runtime-instrumentation,n1sdp-runtime-instrumentation:n1sdp-fip.tftf-firmware configuration in CI.
8.3.1. Results
8.3.1.1. CPU_SUSPEND
to deepest power level
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
3.32 |
13.42 (-45.40%) |
0.28 (-69.57%) |
0 |
0 |
4.02 (-35.78%) |
18.14 (-52.88%) |
0.28 |
1 |
0 |
2.7 (-27.42%) |
17.38 (-49.36%) |
0.26 |
1 |
0 |
2.96 |
10.86 (-73.64%) |
0.26 |
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
2.58 |
24.14 |
0.28 (-69.57%) |
0 |
0 |
4.24 (-32.27%) |
40.1 |
0.3 |
1 |
0 |
3.58 |
35.54 |
0.28 |
1 |
0 |
3.28 |
42.36 |
0.3 |
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
1.62 |
10.14 (-58.10%) |
0.3 |
0 |
0 |
1.86 |
10.62 (-56.44%) |
0.28 (-26.32%) |
1 |
0 |
1.8 |
10.16 (-57.84%) |
0.32 |
1 |
0 |
2.16 |
10.6 (-56.84%) |
0.5 (+56.25%) |
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
1.9 |
23.8 |
0.36 |
0 |
0 |
2.26 |
23.86 |
0.34 |
1 |
0 |
2.02 |
23.4 |
0.36 |
1 |
0 |
2.24 |
23.84 |
0.36 |
8.3.1.2. CPU_SUSPEND
to power level 0
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
0.8 (-57.45%) |
11.98 (-61.75%) |
0.26 |
0 |
0 |
1.54 (-30.63%) |
16.44 (-53.74%) |
0.26 |
1 |
0 |
1.62 (-30.77%) |
16.1 (-53.92%) |
0.3 |
1 |
0 |
1.8 |
10.54 (-55.30%) |
0.2 (-33.33%) |
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
1.46 |
31.7 |
0.32 |
0 |
0 |
2.06 |
35.5 |
0.48 (+60.00%) |
1 |
0 |
1.96 |
35.7 |
0.32 |
1 |
0 |
2.08 |
23.38 |
0.28 |
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
1.44 |
9.9 (-58.05%) |
0.3 |
0 |
0 |
1.74 (-25.64%) |
10.4 (-56.23%) |
0.28 (-33.33%) |
1 |
0 |
1.8 |
10.04 (-57.71%) |
0.34 |
1 |
0 |
1.96 |
10.46 (-56.23%) |
0.44 |
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
1.66 |
23.22 |
0.36 |
0 |
0 |
2.58 |
23.72 |
0.78 (+85.71%) |
1 |
0 |
2.02 |
23.84 |
0.38 |
1 |
0 |
2.16 |
23.92 |
0.34 |
8.3.1.3. CPU_OFF
on all non-lead CPUs
CPU_OFF
on all non-lead CPUs in sequence then, CPU_SUSPEND
on the lead
core to the deepest power level.
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
1.64 |
10.24 (-57.72%) |
0.3 |
0 |
0 |
13.92 |
17.7 (-43.74%) |
0.3 |
1 |
0 |
13.54 |
16.74 (-44.90%) |
0.3 (-37.50%) |
1 |
0 |
14.12 |
18.28 (-41.93%) |
0.3 (-44.44%) |
Cluster |
Core |
Powerdown |
Wakeup |
Cache Flush |
0 |
0 |
1.84 |
23.82 |
0.36 |
0 |
0 |
14.18 |
31.78 |
0.56 (+86.67%) |
1 |
0 |
13.64 |
30.54 |
0.36 |
1 |
0 |
14.18 |
31.82 |
0.68 |
8.3.1.4. CPU_VERSION
in parallel
Cluster |
Core |
Latency |
0 |
0 |
0.12 |
0 |
0 |
0.2 (-28.57%) |
1 |
0 |
0.2 |
1 |
0 |
0.24 (-25.00%) |
Cluster |
Core |
Latency |
0 |
0 |
0.14 |
0 |
0 |
0.2 (-28.57%) |
1 |
0 |
0.2 |
1 |
0 |
0.26 |
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