7.45. Texas Instruments K3low

Trusted Firmware-A (TF-A) implements the EL3 firmware layer for Texas Instruments K3low SoCs. The first generation of K3 architecture based devices used a Cortex R5 processor as a primary boot loader. But the K3low SoC architecture removed the R5 processor and the MPU A53 acts as the primary bootloader. Due to the small static memory foot print on the k3low devices, a two stage boot load architecture is used. In the first stage BL1 boot loader configures and initializes the DDR4/LPDDR4 subsystem and resets back to the ROMCode for second stage booting of BL31 etc.

7.45.1. Boot Flow

TF-A BL1 --> TF-A BL31 --> BL32(OP-TEE) --> TF-A BL31 --> BL33(U-Boot) --> Linux
                                                    \
                                                Optional direct to Linux boot
                                                        \
                                                        --> BL33(Linux)

7.45.2. Build Instructions

TF-A:

make CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=aarch64 PLAT=k3low TARGET_BOARD=am62lx-evm

For bl1 only binary builds:

make CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=aarch64 PLAT=k3low TARGET_BOARD=am62lx-evm am62l_bl1

OP-TEE:

make ARCH=arm CROSS_COMPILE64=aarch64-none-linux-gnu- PLATFORM=k3 CFG_ARM64_core=y all

A53 U-Boot:

make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- am62l_evm_defconfig
make ARCH=arm CROSS_COMPILE=aarch64-none-linux-gnu- BL1=<path> BL31=<path> TEE=<path> BINMAN_INDIRS=<path>

7.45.3. Deploy Images

cp tiboot3.bin tispl.bin u-boot.img /sdcard/boot/

7.46. AM62L Device/ SCMI ID List:

Below are the SCMI ID’s to be used starting with 0. For eg. in the Linux Kernel DT, for FSS OSPI: power-domains = <&scmi_pds 32>;

Device Name	String Representation	SCMI ID
AM62LX_DEV_ADC0	ADC0	0
AM62LX_DEV_GPIOMX_INTR	GPIOMX_INTR	1
AM62LX_DEV_TIMES_INTR	TIMES_INTR	2
AM62LX_DEV_CPSW0	CPSW0	3
AM62LX_DEV_CPT2_AGGR0	CPT2_AGGR0	4
AM62LX_DEV_CPT2_AGGR1	CPT2_AGGR1	5
AM62LX_DEV_WK_CPT2_AGGR0	WK_CPT2_AGGR0	6
AM62LX_DEV_STM0	STM0	7
AM62LX_DEV_DBGSS_WP	DBGSS_WP	8
AM62LX_DEV_DMASS0	DMASS0	9
AM62LX_DEV_DMASS0_BCDMA	DMASS0_BCDMA	10
AM62LX_DEV_DMASS0_PKTDM	DMASS0_PKTDM	11
AM62LX_DEV_WKUP_DMA0	WKUP_DMA0	12
AM62LX_DEV_WK_DMA0_DTHE	WK_DMA0_DTHE	13
AM62LX_DEV_WK_DMA_XLCDMA	WK_DMA_XLCDMA	14
AM62LX_DEV_TIMER0	TIMER0	15
AM62LX_DEV_TIMER1	TIMER1	16
AM62LX_DEV_TIMER2	TIMER2	17
AM62LX_DEV_TIMER3	TIMER3	18
AM62LX_DEV_WKUP_TIMER0	WKUP_TIMER0	19
AM62LX_DEV_WKUP_TIMER1	WKUP_TIMER1	20
AM62LX_DEV_WKUP_SMS_LITE0	WKUP_SMS_LITE0	21
AM62LX_DEV_ECAP0	ECAP0	22
AM62LX_DEV_ECAP1	ECAP1	23
AM62LX_DEV_ECAP2	ECAP2	24
AM62LX_DEV_ELM0	ELM0	25
AM62LX_DEV_MMCSD1	MMCSD1	26
AM62LX_DEV_MMCSD2	MMCSD2	27
AM62LX_DEV_MMCSD0	MMCSD0	28
AM62LX_DEV_EQEP0	EQEP0	29
AM62LX_DEV_EQEP1	EQEP1	30
AM62LX_DEV_EQEP2	EQEP2	31
AM62LX_DEV_FSS0	FSS0	32
AM62LX_DEV_GICSS0	GICSS0	33
AM62LX_DEV_GPIO0	GPIO0	34
AM62LX_DEV_GPIO2	GPIO2	35
AM62LX_DEV_WKUP_GPIO0	WKUP_GPIO0	36
AM62LX_DEV_GPMC0	GPMC0	37
AM62LX_DEV_DSS_DSI0	DSS_DSI0	38
AM62LX_DEV_DSS0	DSS0	39
AM62LX_DEV_EPWM0	EPWM0	40
AM62LX_DEV_EPWM1	EPWM1	41
AM62LX_DEV_EPWM2	EPWM2	42
AM62LX_DEV_LED0	LED0	43
AM62LX_DEV_PBIST0	PBIST0	44
AM62LX_DEV_WKUP_PBIST0	WKUP_PBIST0	45
AM62LX_DEV_WKUP_VTM0	WKUP_VTM0	46
AM62LX_DEV_MCAN0	MCAN0	47
AM62LX_DEV_MCAN1	MCAN1	48
AM62LX_DEV_MCAN2	MCAN2	49
AM62LX_DEV_MCASP0	MCASP0	50
AM62LX_DEV_MCASP1	MCASP1	51
AM62LX_DEV_MCASP2	MCASP2	52
AM62LX_DEV_I2C0	I2C0	53
AM62LX_DEV_I2C1	I2C1	54
AM62LX_DEV_I2C2	I2C2	55
AM62LX_DEV_I2C3	I2C3	56
AM62LX_DEV_WKUP_I2C0	WKUP_I2C0	57
AM62LX_DEV_WKUP_GTC0	WKUP_GTC0	58
AM62LX_DEV_WKUP_RTCSS0	WKUP_RTCSS0	59
AM62LX_DEV_RTI0	RTI0	60
AM62LX_DEV_RTI1	RTI1	61
AM62LX_DEV_DEBUGSS0	DEBUGSS0	62
AM62LX_DEV_MSRAM_96K0	MSRAM_96K0	63
AM62LX_DEV_WK_PSRAM_64K0	WK_PSRAM_64K0	64
AM62LX_DEV_ROM0	ROM0	65
AM62LX_DEV_PSC0	PSC0	66
AM62LX_DEV_WK_DPSLP_SR0	WK_DPSLP_SR0	67
AM62LX_DEV_MCU_MCU_16FF0	MCU_MCU_16FF0	68
AM62LX_DEV_ARM_CPK	ARM_CPK	69
AM62LX_DEV_DDR16SS0	DDR16SS0	70
AM62LX_DEV_WKUP_DFTSS0	WKUP_DFTSS0	71
AM62LX_DEV_MCSPI0	MCSPI0	72
AM62LX_DEV_MCSPI1	MCSPI1	73
AM62LX_DEV_MCSPI2	MCSPI2	74
AM62LX_DEV_MCSPI3	MCSPI3	75
AM62LX_DEV_TRNG_EIP76_WP	TRNG_EIP76_WP	76
AM62LX_DEV_UART1	UART1	77
AM62LX_DEV_UART2	UART2	78
AM62LX_DEV_UART3	UART3	79
AM62LX_DEV_UART4	UART4	80
AM62LX_DEV_UART5	UART5	81
AM62LX_DEV_UART6	UART6	82
AM62LX_DEV_WKUP_UART0	WKUP_UART0	83
AM62LX_DEV_USB0	USB0	84
AM62LX_DEV_USB1	USB1	85
AM62LX_DEV_DPHY_TX0	DPHY_TX0	86
AM62LX_DEV_CLKDIV_0	CLKDIV_0	87
AM62LX_DEV_PBIST_0	PBIST_0	88
AM62LX_DEV_UART0	UART0	89
AM62LX_DEV_BOARD0	BOARD0	90
AM62LX_DEV_WK_GTCCLK_VD	WK_GTCCLK_VD	91
AM62LX_DEV_WK_OBS_MUX	WK_OBS_MUX	92
AM62LX_DEV_WK_CLKOUT_VD	WK_CLKOUT_VD	93
AM62LX_DEV_OBSCLK0_MUX	OBSCLK0_MUX	94
AM62LX_DEV_USB0_ISO_VD	USB0_ISO_VD	95
AM62LX_DEV_USB1_ISO_VD	USB1_ISO_VD	96
AM62LX_DEV_CLK_32K_RC	CLK_32K_RC	97
AM62LX_DEV_A53_0	A53_0	98
AM62LX_DEV_A53_1	A53_1	99
AM62LX_DEV_TIMER1_VD	TIMER1_VD	100
AM62LX_DEV_TIMER3_VD	TIMER3_VD	101
AM62LX_DEV_WK_TIMER_VD	WK_TIMER_VD	102

7.47. AM62L Clock SCMI ID List:

Type	Device Name	Clock Name	Clock String Name	SCMI clk-id
PARENT	AM62LX_DEV_ADC0	AM62LX_DEV_ADC0_ADC_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	ADC0	0
PARENT	AM62LX_DEV_ADC0	AM62LX_DEV_ADC0_ADC_CLK_PARENT_SAM62_PLL_CTRL_WRAP_WKUP_0_CHIP_DIV1_CLK_CLK12	ADC0	1
PARENT	AM62LX_DEV_ADC0	AM62LX_DEV_ADC0_ADC_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT8_CLK	ADC0	2
PARENT	AM62LX_DEV_ADC0	AM62LX_DEV_ADC0_ADC_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	ADC0	3
MUX	AM62LX_DEV_ADC0	AM62LX_DEV_ADC0_ADC_CLK	ADC0	4
PARENT	AM62LX_DEV_ADC0	AM62LX_DEV_ADC0_SYS_CLK	ADC0	5
PARENT	AM62LX_DEV_ADC0	AM62LX_DEV_ADC0_VBUS_CLK	ADC0	6
MUX	AM62LX_DEV_M_GPIOMX_INTR0	AM62LX_DEV_MAIN_GPIOMUX_INTROUTER0_INTR_CLK	MAIN_GPIOMUX_INTROUTER0	7
PARENT	AM62LX_DEV_TIMESYNC_INTR0	AM62LX_DEV_TIMESYNC_INTROUTER0_INTR_CLK	TIMESYNC_INTROUTER0	8
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPPI_CLK_CLK	CPSW0	9
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	CPSW0	10
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK	CPSW0	11
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT	CPSW0	12
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK_PARENT_CLK_32K_RC_SEL_OUT0	CPSW0	13
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	CPSW0	14
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	CPSW0	15
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK_PARENT_SAM62_PLL_CTRL_WRAP_WKUP_0_CHIP_DIV1_CLK_CLK	CPSW0	16
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT0_CLK	CPSW0	17
MUX	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_RFT_CLK	CPSW0	18
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_GMII1_MR_CLK	CPSW0	19
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_GMII1_MT_CLK	CPSW0	20
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_GMII2_MR_CLK	CPSW0	21
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_GMII2_MT_CLK	CPSW0	22
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_GMII_RFT_CLK	CPSW0	23
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_RGMII_MHZ_250_CLK	CPSW0	24
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_RGMII_MHZ_50_CLK	CPSW0	25
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_RGMII_MHZ_5_CLK	CPSW0	26
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_RMII1_MHZ_50_CLK	CPSW0	27
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_RMII2_MHZ_50_CLK	CPSW0	28
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_GENF0	CPSW0	29
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_CPTS_GENF1	CPSW0	30
PARENT	AM62LX_DEV_CPSW0	AM62LX_DEV_CPSW0_MDIO_MDCLK_O	CPSW0	31
PARENT	AM62LX_DEV_CPT2_AGGR0	AM62LX_DEV_CPT2_AGGR0_VCLK_CLK	CPT2_AGGR0	32
PARENT	AM62LX_DEV_CPT2_AGGR1	AM62LX_DEV_CPT2_AGGR1_VCLK_CLK	CPT2_AGGR1	33
PARENT	AM62LX_DEV_WK_CPT2_AGGR0	AM62LX_DEV_WKUP_CPT2_AGGR0_VCLK_CLK	WKUP_CPT2_AGGR0	34
PARENT	AM62LX_DEV_STM0	AM62LX_DEV_STM0_ATB_CLK	STM0	35
PARENT	AM62LX_DEV_STM0	AM62LX_DEV_STM0_CORE_CLK	STM0	36
PARENT	AM62LX_DEV_STM0	AM62LX_DEV_STM0_VBUSP_CLK	STM0	37
PARENT	AM62LX_DEV_DBGSS_WP	AM62LX_DEV_DEBUGSS_WRAP0_ATB_CLK	DEBUGSS_WRAP0	38
PARENT	AM62LX_DEV_DBGSS_WP	AM62LX_DEV_DEBUGSS_WRAP0_CORE_CLK	DEBUGSS_WRAP0	39
PARENT	AM62LX_DEV_DBGSS_WP	AM62LX_DEV_DEBUGSS_WRAP0_JTAG_TCK	DEBUGSS_WRAP0	40
PARENT	AM62LX_DEV_DBGSS_WP	AM62LX_DEV_DEBUGSS_WRAP0_P1500_WRCK	DEBUGSS_WRAP0	41
PARENT	AM62LX_DEV_DBGSS_WP	AM62LX_DEV_DEBUGSS_WRAP0_TREXPT_CLK	DEBUGSS_WRAP0	42
PARENT	AM62LX_DEV_DBGSS_WP	AM62LX_DEV_DEBUGSS_WRAP0_CSTPIU_TRACECLK	DEBUGSS_WRAP0	43
PARENT	AM62LX_DEV_DMASS0_BCDMA	AM62LX_DEV_DMASS0_BCDMA_0_CLK	DMASS0_BCDMA_0	44
PARENT	AM62LX_DEV_DMASS0_PKTDM	AM62LX_DEV_DMASS0_PKTDMA_0_CLK	DMASS0_PKTDMA_0	45
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_HCLK_CLK	TIMER0	46
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	TIMER0	47
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_CLK_32K_RC_SEL_OUT0	TIMER0	48
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF0	TIMER0	49
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF1	TIMER0	50
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK	TIMER0	51
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	TIMER0	52
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	TIMER0	53
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	TIMER0	54
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT	TIMER0	55
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT1_CLK	TIMER0	56
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	TIMER0	57
MUX	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_TCLK_CLK	TIMER0	58
PARENT	AM62LX_DEV_TIMER0	AM62LX_DEV_TIMER0_TIMER_PWM	TIMER0	59
PARENT	AM62LX_DEV_TIMER1	AM62LX_DEV_TIMER1_TIMER_HCLK_CLK	TIMER1	60
PARENT	AM62LX_DEV_TIMER1	AM62LX_DEV_TIMER1_TIMER_TCLK_CLK_PARENT_MAIN_TIMERCLKN_SEL_OUT1	TIMER1	61
PARENT	AM62LX_DEV_TIMER1	AM62LX_DEV_TIMER1_TIMER_TCLK_CLK_PARENT_DMTIMER_DMC1MS_MAIN_0_TIMER_PWM	TIMER1	62
MUX	AM62LX_DEV_TIMER1	AM62LX_DEV_TIMER1_TIMER_TCLK_CLK	TIMER1	63
PARENT	AM62LX_DEV_TIMER1	AM62LX_DEV_TIMER1_TIMER_PWM	TIMER1	64
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_HCLK_CLK	TIMER2	65
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	TIMER2	66
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_CLK_32K_RC_SEL_OUT0	TIMER2	67
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF0	TIMER2	68
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF1	TIMER2	69
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK	TIMER2	70
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	TIMER2	71
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	TIMER2	72
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	TIMER2	73
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT	TIMER2	74
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT1_CLK	TIMER2	75
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	TIMER2	76
MUX	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_TCLK_CLK	TIMER2	77
PARENT	AM62LX_DEV_TIMER2	AM62LX_DEV_TIMER2_TIMER_PWM	TIMER2	78
PARENT	AM62LX_DEV_TIMER3	AM62LX_DEV_TIMER3_TIMER_HCLK_CLK	TIMER3	79
PARENT	AM62LX_DEV_TIMER3	AM62LX_DEV_TIMER3_TIMER_TCLK_CLK_PARENT_MAIN_TIMERCLKN_SEL_OUT3	TIMER3	80
PARENT	AM62LX_DEV_TIMER3	AM62LX_DEV_TIMER3_TIMER_TCLK_CLK_PARENT_DMTIMER_DMC1MS_MAIN_2_TIMER_PWM	TIMER3	81
MUX	AM62LX_DEV_TIMER3	AM62LX_DEV_TIMER3_TIMER_TCLK_CLK	TIMER3	82
PARENT	AM62LX_DEV_TIMER3	AM62LX_DEV_TIMER3_TIMER_PWM	TIMER3	83
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_HCLK_CLK	WKUP_TIMER0	84
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	WKUP_TIMER0	85
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK_PARENT_SAM62_PLL_CTRL_WRAP_WKUP_0_CHIP_DIV1_CLK_CLK2	WKUP_TIMER0	86
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	WKUP_TIMER0	87
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	WKUP_TIMER0	88
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	WKUP_TIMER0	89
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK_PARENT_CLK_32K_RC_SEL_OUT0	WKUP_TIMER0	90
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF0	WKUP_TIMER0	91
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3	WKUP_TIMER0	92
MUX	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_TCLK_CLK	WKUP_TIMER0	93
PARENT	AM62LX_DEV_WKUP_TIMER0	AM62LX_DEV_WKUP_TIMER0_TIMER_PWM	WKUP_TIMER0	94
PARENT	AM62LX_DEV_WKUP_TIMER1	AM62LX_DEV_WKUP_TIMER1_TIMER_HCLK_CLK	WKUP_TIMER1	95
PARENT	AM62LX_DEV_WKUP_TIMER1	AM62LX_DEV_WKUP_TIMER1_TIMER_TCLK_CLK_PARENT_WKUP_TIMERCLKN_SEL_OUT1	WKUP_TIMER1	96
PARENT	AM62LX_DEV_WKUP_TIMER1	AM62LX_DEV_WKUP_TIMER1_TIMER_TCLK_CLK_PARENT_DMTIMER_DMC1MS_WKUP_0_TIMER_PWM	WKUP_TIMER1	97
MUX	AM62LX_DEV_WKUP_TIMER1	AM62LX_DEV_WKUP_TIMER1_TIMER_TCLK_CLK	WKUP_TIMER1	98
PARENT	AM62LX_DEV_ECAP0	AM62LX_DEV_ECAP0_VBUS_CLK	ECAP0	99
PARENT	AM62LX_DEV_ECAP1	AM62LX_DEV_ECAP1_VBUS_CLK	ECAP1	100
PARENT	AM62LX_DEV_ECAP2	AM62LX_DEV_ECAP2_VBUS_CLK	ECAP2	101
PARENT	AM62LX_DEV_ELM0	AM62LX_DEV_ELM0_VBUSP_CLK	ELM0	102
PARENT	AM62LX_DEV_MMCSD1	AM62LX_DEV_MMCSD1_EMMCSDSS_IO_CLK_I_PARENT_BOARD_0_MMC1_CLKLB_OUT	MMCSD1	103
PARENT	AM62LX_DEV_MMCSD1	AM62LX_DEV_MMCSD1_EMMCSDSS_IO_CLK_I_PARENT_BOARD_0_MMC1_CLK_OUT	MMCSD1	104
MUX	AM62LX_DEV_MMCSD1	AM62LX_DEV_MMCSD1_EMMCSDSS_IO_CLK_I	MMCSD1	105
PARENT	AM62LX_DEV_MMCSD1	AM62LX_DEV_MMCSD1_EMMCSDSS_VBUS_CLK	MMCSD1	106
PARENT	AM62LX_DEV_MMCSD1	AM62LX_DEV_MMCSD1_EMMCSDSS_XIN_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT5_CLK	MMCSD1	107
PARENT	AM62LX_DEV_MMCSD1	AM62LX_DEV_MMCSD1_EMMCSDSS_XIN_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT9_CLK	MMCSD1	108
MUX	AM62LX_DEV_MMCSD1	AM62LX_DEV_MMCSD1_EMMCSDSS_XIN_CLK	MMCSD1	109
PARENT	AM62LX_DEV_MMCSD1	AM62LX_DEV_MMCSD1_EMMCSDSS_IO_CLK_O	MMCSD1	110
PARENT	AM62LX_DEV_MMCSD2	AM62LX_DEV_MMCSD2_EMMCSDSS_IO_CLK_I_PARENT_BOARD_0_MMC2_CLKLB_OUT	MMCSD2	111
PARENT	AM62LX_DEV_MMCSD2	AM62LX_DEV_MMCSD2_EMMCSDSS_IO_CLK_I_PARENT_BOARD_0_MMC2_CLK_OUT	MMCSD2	112
MUX	AM62LX_DEV_MMCSD2	AM62LX_DEV_MMCSD2_EMMCSDSS_IO_CLK_I	MMCSD2	113
PARENT	AM62LX_DEV_MMCSD2	AM62LX_DEV_MMCSD2_EMMCSDSS_VBUS_CLK	MMCSD2	114
PARENT	AM62LX_DEV_MMCSD2	AM62LX_DEV_MMCSD2_EMMCSDSS_XIN_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT5_CLK	MMCSD2	115
PARENT	AM62LX_DEV_MMCSD2	AM62LX_DEV_MMCSD2_EMMCSDSS_XIN_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT9_CLK	MMCSD2	116
MUX	AM62LX_DEV_MMCSD2	AM62LX_DEV_MMCSD2_EMMCSDSS_XIN_CLK	MMCSD2	117
PARENT	AM62LX_DEV_MMCSD2	AM62LX_DEV_MMCSD2_EMMCSDSS_IO_CLK_O	MMCSD2	118
PARENT	AM62LX_DEV_MMCSD0	AM62LX_DEV_MMCSD0_EMMCSDSS_IO_CLK_I_PARENT_BOARD_0_MMC0_CLKLB_OUT	MMCSD0	119
PARENT	AM62LX_DEV_MMCSD0	AM62LX_DEV_MMCSD0_EMMCSDSS_IO_CLK_I_PARENT_BOARD_0_MMC0_CLK_OUT	MMCSD0	120
MUX	AM62LX_DEV_MMCSD0	AM62LX_DEV_MMCSD0_EMMCSDSS_IO_CLK_I	MMCSD0	121
PARENT	AM62LX_DEV_MMCSD0	AM62LX_DEV_MMCSD0_EMMCSDSS_VBUS_CLK	MMCSD0	122
PARENT	AM62LX_DEV_MMCSD0	AM62LX_DEV_MMCSD0_EMMCSDSS_XIN_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT5_CLK	MMCSD0	123
PARENT	AM62LX_DEV_MMCSD0	AM62LX_DEV_MMCSD0_EMMCSDSS_XIN_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT9_CLK	MMCSD0	124
MUX	AM62LX_DEV_MMCSD0	AM62LX_DEV_MMCSD0_EMMCSDSS_XIN_CLK	MMCSD0	125
PARENT	AM62LX_DEV_MMCSD0	AM62LX_DEV_MMCSD0_EMMCSDSS_IO_CLK_O	MMCSD0	126
PARENT	AM62LX_DEV_EQEP0	AM62LX_DEV_EQEP0_VBUS_CLK	EQEP0	127
PARENT	AM62LX_DEV_EQEP1	AM62LX_DEV_EQEP1_VBUS_CLK	EQEP1	128
PARENT	AM62LX_DEV_EQEP2	AM62LX_DEV_EQEP2_VBUS_CLK	EQEP2	129
PARENT	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_OSPI0_DQS_CLK	FSS0	130
PARENT	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_OSPI0_ICLK_CLK_PARENT_BOARD_0_OSPI0_DQS_OUT	FSS0	131
PARENT	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_OSPI0_ICLK_CLK_PARENT_BOARD_0_OSPI0_LBCLKO_OUT	FSS0	132
MUX	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_OSPI0_ICLK_CLK	FSS0	133
PARENT	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_OSPI0_RCLK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT7_CLK	FSS0	134
PARENT	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_OSPI0_RCLK_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT4_CLK	FSS0	135
MUX	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_OSPI0_RCLK_CLK	FSS0	136
PARENT	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_VBUS_CLK	FSS0	137
PARENT	AM62LX_DEV_FSS0	AM62LX_DEV_FSS0_OSPI0_OCLK_CLK	FSS0	138
PARENT	AM62LX_DEV_GICSS0	AM62LX_DEV_GICSS0_VCLK_CLK	GICSS0	139
PARENT	AM62LX_DEV_GPIO0	AM62LX_DEV_GPIO0_MMR_CLK	GPIO0	140
PARENT	AM62LX_DEV_GPIO2	AM62LX_DEV_GPIO2_MMR_CLK	GPIO2	141
PARENT	AM62LX_DEV_WKUP_GPIO0	AM62LX_DEV_WKUP_GPIO0_MMR_CLK_PARENT_SAM62_PLL_CTRL_WRAP_WKUP_0_CHIP_DIV1_CLK_CLK4	WKUP_GPIO0	142
PARENT	AM62LX_DEV_WKUP_GPIO0	AM62LX_DEV_WKUP_GPIO0_MMR_CLK_PARENT_RTCSS_WKUP_0_OSC_32K_CLK	WKUP_GPIO0	143
PARENT	AM62LX_DEV_WKUP_GPIO0	AM62LX_DEV_WKUP_GPIO0_MMR_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3	WKUP_GPIO0	144
PARENT	AM62LX_DEV_WKUP_GPIO0	AM62LX_DEV_WKUP_GPIO0_MMR_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	WKUP_GPIO0	145
MUX	AM62LX_DEV_WKUP_GPIO0	AM62LX_DEV_WKUP_GPIO0_MMR_CLK	WKUP_GPIO0	146
PARENT	AM62LX_DEV_GPMC0	AM62LX_DEV_GPMC0_FUNC_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT3_CLK	GPMC0	147
PARENT	AM62LX_DEV_GPMC0	AM62LX_DEV_GPMC0_FUNC_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT3_CLK	GPMC0	148
MUX	AM62LX_DEV_GPMC0	AM62LX_DEV_GPMC0_FUNC_CLK	GPMC0	149
PARENT	AM62LX_DEV_GPMC0	AM62LX_DEV_GPMC0_PI_GPMC_RET_CLK	GPMC0	150
PARENT	AM62LX_DEV_GPMC0	AM62LX_DEV_GPMC0_VBUSM_CLK	GPMC0	151
PARENT	AM62LX_DEV_GPMC0	AM62LX_DEV_GPMC0_PO_GPMC_DEV_CLK	GPMC0	152
PARENT	AM62LX_DEV_DSS_DSI0	AM62LX_DEV_DSS_DSI0_DPHY_0_RX_ESC_CLK	DSS_DSI0	153
PARENT	AM62LX_DEV_DSS_DSI0	AM62LX_DEV_DSS_DSI0_DPHY_0_TX_ESC_CLK	DSS_DSI0	154
PARENT	AM62LX_DEV_DSS_DSI0	AM62LX_DEV_DSS_DSI0_DPI_0_CLK	DSS_DSI0	155
PARENT	AM62LX_DEV_DSS_DSI0	AM62LX_DEV_DSS_DSI0_PLL_CTRL_CLK	DSS_DSI0	156
PARENT	AM62LX_DEV_DSS_DSI0	AM62LX_DEV_DSS_DSI0_PPI_0_TXBYTECLKHS_CL_CLK	DSS_DSI0	157
PARENT	AM62LX_DEV_DSS_DSI0	AM62LX_DEV_DSS_DSI0_SYS_CLK	DSS_DSI0	158
PARENT	AM62LX_DEV_DSS0	AM62LX_DEV_DSS0_DPI_0_IN_CLK_PARENT_HSDIV0_16FFT_MAIN_17_HSDIVOUT0_CLK	DSS0	159
PARENT	AM62LX_DEV_DSS0	AM62LX_DEV_DSS0_DPI_0_IN_CLK_PARENT_BOARD_0_VOUT0_EXTPCLKIN_OUT	DSS0	160
MUX	AM62LX_DEV_DSS0	AM62LX_DEV_DSS0_DPI_0_IN_CLK	DSS0	161
PARENT	AM62LX_DEV_DSS0	AM62LX_DEV_DSS0_DSS_FUNC_CLK	DSS0	162
PARENT	AM62LX_DEV_DSS0	AM62LX_DEV_DSS0_DPI_0_OUT_CLK	DSS0	163
PARENT	AM62LX_DEV_EPWM0	AM62LX_DEV_EPWM0_VBUSP_CLK	EPWM0	164
PARENT	AM62LX_DEV_EPWM1	AM62LX_DEV_EPWM1_VBUSP_CLK	EPWM1	165
PARENT	AM62LX_DEV_EPWM2	AM62LX_DEV_EPWM2_VBUSP_CLK	EPWM2	166
PARENT	AM62LX_DEV_LED0	AM62LX_DEV_LED0_VBUS_CLK	LED0	167
PARENT	AM62LX_DEV_PBIST0	AM62LX_DEV_PBIST0_CLK8_CLK	PBIST0	168
PARENT	AM62LX_DEV_PBIST0	AM62LX_DEV_PBIST0_TCLK_CLK	PBIST0	169
PARENT	AM62LX_DEV_WKUP_PBIST0	AM62LX_DEV_WKUP_PBIST0_CLK8_CLK	WKUP_PBIST0	170
PARENT	AM62LX_DEV_WKUP_VTM0	AM62LX_DEV_WKUP_VTM0_FIX_REF2_CLK	WKUP_VTM0	171
PARENT	AM62LX_DEV_WKUP_VTM0	AM62LX_DEV_WKUP_VTM0_FIX_REF_CLK	WKUP_VTM0	172
PARENT	AM62LX_DEV_WKUP_VTM0	AM62LX_DEV_WKUP_VTM0_VBUSP_CLK	WKUP_VTM0	173
PARENT	AM62LX_DEV_MCAN0	AM62LX_DEV_MCAN0_MCANSS_CCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT4_CLK	MCAN0	174
PARENT	AM62LX_DEV_MCAN0	AM62LX_DEV_MCAN0_MCANSS_CCLK_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	MCAN0	175
PARENT	AM62LX_DEV_MCAN0	AM62LX_DEV_MCAN0_MCANSS_CCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	MCAN0	176
PARENT	AM62LX_DEV_MCAN0	AM62LX_DEV_MCAN0_MCANSS_CCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	MCAN0	177
MUX	AM62LX_DEV_MCAN0	AM62LX_DEV_MCAN0_MCANSS_CCLK_CLK	MCAN0	178
PARENT	AM62LX_DEV_MCAN0	AM62LX_DEV_MCAN0_MCANSS_HCLK_CLK	MCAN0	179
PARENT	AM62LX_DEV_MCAN1	AM62LX_DEV_MCAN1_MCANSS_CCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT4_CLK	MCAN1	180
PARENT	AM62LX_DEV_MCAN1	AM62LX_DEV_MCAN1_MCANSS_CCLK_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	MCAN1	181
PARENT	AM62LX_DEV_MCAN1	AM62LX_DEV_MCAN1_MCANSS_CCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	MCAN1	182
PARENT	AM62LX_DEV_MCAN1	AM62LX_DEV_MCAN1_MCANSS_CCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	MCAN1	183
MUX	AM62LX_DEV_MCAN1	AM62LX_DEV_MCAN1_MCANSS_CCLK_CLK	MCAN1	184
PARENT	AM62LX_DEV_MCAN1	AM62LX_DEV_MCAN1_MCANSS_HCLK_CLK	MCAN1	185
PARENT	AM62LX_DEV_MCAN2	AM62LX_DEV_MCAN2_MCANSS_CCLK_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT4_CLK	MCAN2	186
PARENT	AM62LX_DEV_MCAN2	AM62LX_DEV_MCAN2_MCANSS_CCLK_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	MCAN2	187
PARENT	AM62LX_DEV_MCAN2	AM62LX_DEV_MCAN2_MCANSS_CCLK_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	MCAN2	188
PARENT	AM62LX_DEV_MCAN2	AM62LX_DEV_MCAN2_MCANSS_CCLK_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	MCAN2	189
MUX	AM62LX_DEV_MCAN2	AM62LX_DEV_MCAN2_MCANSS_CCLK_CLK	MCAN2	190
PARENT	AM62LX_DEV_MCAN2	AM62LX_DEV_MCAN2_MCANSS_HCLK_CLK	MCAN2	191
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_AUX_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT8_CLK	MCASP0	192
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_AUX_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT1_CLK	MCASP0	193
MUX	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_AUX_CLK	MCASP0	194
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_ACLKR_PIN	MCASP0	195
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_ACLKX_PIN	MCASP0	196
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AFSR_PIN	MCASP0	197
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AFSX_PIN	MCASP0	198
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKR_PIN_PARENT_BOARD_0_EXT_REFCLK1_OUT	MCASP0	199
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKR_PIN_PARENT_GLUELOGIC_HFOSC0_CLK	MCASP0	200
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKR_PIN_PARENT_BOARD_0_AUDIO_EXT_REFCLK0_OUT	MCASP0	201
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKR_PIN_PARENT_BOARD_0_AUDIO_EXT_REFCLK1_OUT	MCASP0	202
MUX	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKR_PIN	MCASP0	203
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKX_PIN_PARENT_BOARD_0_EXT_REFCLK1_OUT	MCASP0	204
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKX_PIN_PARENT_GLUELOGIC_HFOSC0_CLK	MCASP0	205
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKX_PIN_PARENT_BOARD_0_AUDIO_EXT_REFCLK0_OUT	MCASP0	206
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKX_PIN_PARENT_BOARD_0_AUDIO_EXT_REFCLK1_OUT	MCASP0	207
MUX	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKX_PIN	MCASP0	208
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_VBUSP_CLK	MCASP0	209
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_ACLKR_POUT	MCASP0	210
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_ACLKX_POUT	MCASP0	211
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AFSR_POUT	MCASP0	212
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AFSX_POUT	MCASP0	213
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKR_POUT	MCASP0	214
PARENT	AM62LX_DEV_MCASP0	AM62LX_DEV_MCASP0_MCASP_AHCLKX_POUT	MCASP0	215
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_AUX_CLK	MCASP1	216
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_ACLKR_PIN	MCASP1	217
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_ACLKX_PIN	MCASP1	218
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_AFSR_PIN	MCASP1	219
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_AFSX_PIN	MCASP1	220
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_AHCLKR_PIN	MCASP1	221
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_AHCLKX_PIN	MCASP1	222
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_VBUSP_CLK	MCASP1	223
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_ACLKR_POUT	MCASP1	224
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_ACLKX_POUT	MCASP1	225
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_AFSR_POUT	MCASP1	226
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_AFSX_POUT	MCASP1	227
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_AHCLKR_POUT	MCASP1	228
PARENT	AM62LX_DEV_MCASP1	AM62LX_DEV_MCASP1_MCASP_AHCLKX_POUT	MCASP1	229
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_AUX_CLK	MCASP2	230
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_ACLKR_PIN	MCASP2	231
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_ACLKX_PIN	MCASP2	232
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_AFSR_PIN	MCASP2	233
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_AFSX_PIN	MCASP2	234
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_AHCLKR_PIN	MCASP2	235
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_AHCLKX_PIN	MCASP2	236
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_VBUSP_CLK	MCASP2	237
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_ACLKR_POUT	MCASP2	238
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_ACLKX_POUT	MCASP2	239
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_AFSR_POUT	MCASP2	240
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_AFSX_POUT	MCASP2	241
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_AHCLKR_POUT	MCASP2	242
PARENT	AM62LX_DEV_MCASP2	AM62LX_DEV_MCASP2_MCASP_AHCLKX_POUT	MCASP2	243
PARENT	AM62LX_DEV_I2C0	AM62LX_DEV_I2C0_CLK	I2C0	244
PARENT	AM62LX_DEV_I2C0	AM62LX_DEV_I2C0_PISCL	I2C0	245
PARENT	AM62LX_DEV_I2C0	AM62LX_DEV_I2C0_PISYS_CLK	I2C0	246
PARENT	AM62LX_DEV_I2C0	AM62LX_DEV_I2C0_PORSCL	I2C0	247
PARENT	AM62LX_DEV_I2C1	AM62LX_DEV_I2C1_CLK	I2C1	248
PARENT	AM62LX_DEV_I2C1	AM62LX_DEV_I2C1_PISCL	I2C1	249
PARENT	AM62LX_DEV_I2C1	AM62LX_DEV_I2C1_PISYS_CLK	I2C1	250
PARENT	AM62LX_DEV_I2C1	AM62LX_DEV_I2C1_PORSCL	I2C1	251
PARENT	AM62LX_DEV_I2C2	AM62LX_DEV_I2C2_CLK	I2C2	252
PARENT	AM62LX_DEV_I2C2	AM62LX_DEV_I2C2_PISCL	I2C2	253
PARENT	AM62LX_DEV_I2C2	AM62LX_DEV_I2C2_PISYS_CLK	I2C2	254
PARENT	AM62LX_DEV_I2C2	AM62LX_DEV_I2C2_PORSCL	I2C2	255
PARENT	AM62LX_DEV_I2C3	AM62LX_DEV_I2C3_CLK	I2C3	256
PARENT	AM62LX_DEV_I2C3	AM62LX_DEV_I2C3_PISCL	I2C3	257
PARENT	AM62LX_DEV_I2C3	AM62LX_DEV_I2C3_PISYS_CLK	I2C3	258
PARENT	AM62LX_DEV_I2C3	AM62LX_DEV_I2C3_PORSCL	I2C3	259
PARENT	AM62LX_DEV_WKUP_I2C0	AM62LX_DEV_WKUP_I2C0_CLK	WKUP_I2C0	260
PARENT	AM62LX_DEV_WKUP_I2C0	AM62LX_DEV_WKUP_I2C0_PISCL	WKUP_I2C0	261
PARENT	AM62LX_DEV_WKUP_I2C0	AM62LX_DEV_WKUP_I2C0_PISYS_CLK	WKUP_I2C0	262
PARENT	AM62LX_DEV_WKUP_I2C0	AM62LX_DEV_WKUP_I2C0_PORSCL	WKUP_I2C0	263
PARENT	AM62LX_DEV_WKUP_GTC0	AM62LX_DEV_WKUP_GTC0_GTC_CLK_PARENT_WKUP_GTCCLK_SEL_OUT0	WKUP_GTC0	264
PARENT	AM62LX_DEV_WKUP_GTC0	AM62LX_DEV_WKUP_GTC0_GTC_CLK_PARENT_CLK_32K_RC_SEL_OUT0	WKUP_GTC0	265
MUX	AM62LX_DEV_WKUP_GTC0	AM62LX_DEV_WKUP_GTC0_GTC_CLK	WKUP_GTC0	266
PARENT	AM62LX_DEV_WKUP_GTC0	AM62LX_DEV_WKUP_GTC0_VBUSP_CLK	WKUP_GTC0	267
PARENT	AM62LX_DEV_WKUP_RTCSS0	AM62LX_DEV_WKUP_RTCSS0_ANA_OSC32K_CLK	WKUP_RTCSS0	268
PARENT	AM62LX_DEV_WKUP_RTCSS0	AM62LX_DEV_WKUP_RTCSS0_AUX_32K_CLK	WKUP_RTCSS0	269
PARENT	AM62LX_DEV_WKUP_RTCSS0	AM62LX_DEV_WKUP_RTCSS0_JTAG_WRCK	WKUP_RTCSS0	270
PARENT	AM62LX_DEV_WKUP_RTCSS0	AM62LX_DEV_WKUP_RTCSS0_VCLK_CLK	WKUP_RTCSS0	271
PARENT	AM62LX_DEV_WKUP_RTCSS0	AM62LX_DEV_WKUP_RTCSS0_OSC_32K_CLK	WKUP_RTCSS0	272
PARENT	AM62LX_DEV_RTI0	AM62LX_DEV_RTI0_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	RTI0	273
PARENT	AM62LX_DEV_RTI0	AM62LX_DEV_RTI0_RTI_CLK_PARENT_CLK_32K_RC_SEL_OUT0	RTI0	274
PARENT	AM62LX_DEV_RTI0	AM62LX_DEV_RTI0_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	RTI0	275
PARENT	AM62LX_DEV_RTI0	AM62LX_DEV_RTI0_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3	RTI0	276
MUX	AM62LX_DEV_RTI0	AM62LX_DEV_RTI0_RTI_CLK	RTI0	277
PARENT	AM62LX_DEV_RTI0	AM62LX_DEV_RTI0_VBUSP_CLK	RTI0	278
PARENT	AM62LX_DEV_RTI1	AM62LX_DEV_RTI1_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	RTI1	279
PARENT	AM62LX_DEV_RTI1	AM62LX_DEV_RTI1_RTI_CLK_PARENT_CLK_32K_RC_SEL_OUT0	RTI1	280
PARENT	AM62LX_DEV_RTI1	AM62LX_DEV_RTI1_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	RTI1	281
PARENT	AM62LX_DEV_RTI1	AM62LX_DEV_RTI1_RTI_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3	RTI1	282
MUX	AM62LX_DEV_RTI1	AM62LX_DEV_RTI1_RTI_CLK	RTI1	283
PARENT	AM62LX_DEV_RTI1	AM62LX_DEV_RTI1_VBUSP_CLK	RTI1	284
PARENT	AM62LX_DEV_DEBUGSS0	AM62LX_DEV_DEBUGSS0_CFG_CLK	DEBUGSS0	285
PARENT	AM62LX_DEV_DEBUGSS0	AM62LX_DEV_DEBUGSS0_DBG_CLK	DEBUGSS0	286
PARENT	AM62LX_DEV_DEBUGSS0	AM62LX_DEV_DEBUGSS0_SYS_CLK	DEBUGSS0	287
PARENT	AM62LX_DEV_MSRAM_96K0	AM62LX_DEV_MSRAM_96K0_VCLK_CLK	MSRAM_96K0	288
PARENT	AM62LX_DEV_WK_PSRAM_64K0	AM62LX_DEV_WKUP_PSRAM_64K0_CLK_CLK	WKUP_PSRAM_64K0	289
PARENT	AM62LX_DEV_ROM0	AM62LX_DEV_ROM0_CLK_CLK	ROM0	290
PARENT	AM62LX_DEV_PSC0	AM62LX_DEV_PSC0_CLK	PSC0	291
PARENT	AM62LX_DEV_PSC0	AM62LX_DEV_PSC0_SLOW_CLK	PSC0	292
PARENT	AM62LX_DEV_WK_DPSLP_SR0	AM62LX_DEV_WKUP_DEEPSLEEP_SOURCES0_CLK_12M_RC_CLK	WKUP_DEEPSLEEP_SOURCES0	293
PARENT	AM62LX_DEV_ARM_COREPACK_0	AM62LX_DEV_COMPUTE_CLUSTER0_ARM_COREPACK_0_COREPAC_ARM_CLK_CLK	ARM_COREPACK_0	294
PARENT	AM62LX_DEV_ARM_COREPACK_0	AM62LX_DEV_COMPUTE_CLUSTER0_ARM_COREPACK_0_PLL_CTRL_CLK	ARM_COREPACK_0	295
PARENT	AM62LX_DEV_ARM_COREPACK_0	AM62LX_DEV_COMPUTE_CLUSTER0_ARM_COREPACK_0_A53_DIVH_CLK4_OBSCLK_OUT_CLK	ARM_COREPACK_0	296
PARENT	AM62LX_DEV_WKUP_DFTSS0	AM62LX_DEV_WKUP_DFTSS0_PLL_CLK	WKUP_DFTSS0	297
PARENT	AM62LX_DEV_WKUP_DFTSS0	AM62LX_DEV_WKUP_DFTSS0_VBUSP_CLK_CLK	WKUP_DFTSS0	298
PARENT	AM62LX_DEV_MCSPI0	AM62LX_DEV_MCSPI0_CLKSPIREF_CLK	MCSPI0	299
PARENT	AM62LX_DEV_MCSPI0	AM62LX_DEV_MCSPI0_VBUSP_CLK	MCSPI0	300
PARENT	AM62LX_DEV_MCSPI0	AM62LX_DEV_MCSPI0_IO_CLKSPIO_CLK	MCSPI0	301
PARENT	AM62LX_DEV_MCSPI1	AM62LX_DEV_MCSPI1_CLKSPIREF_CLK	MCSPI1	302
PARENT	AM62LX_DEV_MCSPI1	AM62LX_DEV_MCSPI1_VBUSP_CLK	MCSPI1	303
PARENT	AM62LX_DEV_MCSPI1	AM62LX_DEV_MCSPI1_IO_CLKSPIO_CLK	MCSPI1	304
PARENT	AM62LX_DEV_MCSPI2	AM62LX_DEV_MCSPI2_CLKSPIREF_CLK	MCSPI2	305
PARENT	AM62LX_DEV_MCSPI2	AM62LX_DEV_MCSPI2_VBUSP_CLK	MCSPI2	306
PARENT	AM62LX_DEV_MCSPI2	AM62LX_DEV_MCSPI2_IO_CLKSPIO_CLK	MCSPI2	307
PARENT	AM62LX_DEV_MCSPI3	AM62LX_DEV_MCSPI3_CLKSPIREF_CLK	MCSPI3	308
PARENT	AM62LX_DEV_MCSPI3	AM62LX_DEV_MCSPI3_VBUSP_CLK	MCSPI3	309
PARENT	AM62LX_DEV_MCSPI3	AM62LX_DEV_MCSPI3_IO_CLKSPIO_CLK	MCSPI3	310
PARENT	AM62LX_DEV_TRNG_EIP76_WP	AM62LX_DEV_TRNG_DRBG_EIP76D_WRAP0_VCLK_CLK	TRNG_DRBG_EIP76D_WRAP0	311
PARENT	AM62LX_DEV_UART1	AM62LX_DEV_UART1_FCLK_CLK	UART1	312
PARENT	AM62LX_DEV_UART1	AM62LX_DEV_UART1_VBUSP_CLK	UART1	313
PARENT	AM62LX_DEV_UART2	AM62LX_DEV_UART2_FCLK_CLK	UART2	314
PARENT	AM62LX_DEV_UART2	AM62LX_DEV_UART2_VBUSP_CLK	UART2	315
PARENT	AM62LX_DEV_UART3	AM62LX_DEV_UART3_FCLK_CLK	UART3	316
PARENT	AM62LX_DEV_UART3	AM62LX_DEV_UART3_VBUSP_CLK	UART3	317
PARENT	AM62LX_DEV_UART4	AM62LX_DEV_UART4_FCLK_CLK	UART4	318
PARENT	AM62LX_DEV_UART4	AM62LX_DEV_UART4_VBUSP_CLK	UART4	319
PARENT	AM62LX_DEV_UART5	AM62LX_DEV_UART5_FCLK_CLK	UART5	320
PARENT	AM62LX_DEV_UART5	AM62LX_DEV_UART5_VBUSP_CLK	UART5	321
PARENT	AM62LX_DEV_UART6	AM62LX_DEV_UART6_FCLK_CLK	UART6	322
PARENT	AM62LX_DEV_UART6	AM62LX_DEV_UART6_VBUSP_CLK	UART6	323
PARENT	AM62LX_DEV_WKUP_UART0	AM62LX_DEV_WKUP_UART0_FCLK_CLK	WKUP_UART0	324
PARENT	AM62LX_DEV_WKUP_UART0	AM62LX_DEV_WKUP_UART0_VBUSP_CLK	WKUP_UART0	325
PARENT	AM62LX_DEV_USB0	AM62LX_DEV_USB0_BUS_CLK	USB0	326
PARENT	AM62LX_DEV_USB0	AM62LX_DEV_USB0_CFG_CLK	USB0	327
PARENT	AM62LX_DEV_USB0	AM62LX_DEV_USB0_USB2_APB_PCLK_CLK	USB0	328
PARENT	AM62LX_DEV_USB0	AM62LX_DEV_USB0_USB2_REFCLOCK_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	USB0	329
PARENT	AM62LX_DEV_USB0	AM62LX_DEV_USB0_USB2_REFCLOCK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT8_CLK4	USB0	330
MUX	AM62LX_DEV_USB0	AM62LX_DEV_USB0_USB2_REFCLOCK_CLK	USB0	331
PARENT	AM62LX_DEV_USB0	AM62LX_DEV_USB0_USB2_TAP_TCK	USB0	332
PARENT	AM62LX_DEV_USB1	AM62LX_DEV_USB1_BUS_CLK	USB1	333
PARENT	AM62LX_DEV_USB1	AM62LX_DEV_USB1_CFG_CLK	USB1	334
PARENT	AM62LX_DEV_USB1	AM62LX_DEV_USB1_USB2_APB_PCLK_CLK	USB1	335
PARENT	AM62LX_DEV_USB1	AM62LX_DEV_USB1_USB2_REFCLOCK_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	USB1	336
PARENT	AM62LX_DEV_USB1	AM62LX_DEV_USB1_USB2_REFCLOCK_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT8_CLK4	USB1	337
MUX	AM62LX_DEV_USB1	AM62LX_DEV_USB1_USB2_REFCLOCK_CLK	USB1	338
PARENT	AM62LX_DEV_USB1	AM62LX_DEV_USB1_USB2_TAP_TCK	USB1	339
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_CLK	DPHY_TX0	340
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_DPHY_REF_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	DPHY_TX0	341
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_DPHY_REF_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT8_CLK	DPHY_TX0	342
MUX	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_DPHY_REF_CLK	DPHY_TX0	343
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_IP1_PPI_M_TXCLKESC_CLK	DPHY_TX0	344
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_IP2_PPI_M_TXCLKESC_CLK	DPHY_TX0	345
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_IP3_PPI_M_TXCLKESC_CLK	DPHY_TX0	346
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_IP4_PPI_M_TXCLKESC_CLK	DPHY_TX0	347
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_PSM_CLK	DPHY_TX0	348
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_IP1_PPI_M_RXCLKESC_CLK	DPHY_TX0	349
PARENT	AM62LX_DEV_DPHY_TX0	AM62LX_DEV_DPHY_TX0_IP1_PPI_TXBYTECLKHS_CL_CLK	DPHY_TX0	350
PARENT	AM62LX_DEV_CLKDIV_0	AM62LX_DEV_COMPUTE_CLUSTER0_CLKDIV_0_FUNC_CLKIN_CLK	CLKDIV_0	351
PARENT	AM62LX_DEV_CLKDIV_0	AM62LX_DEV_COMPUTE_CLUSTER0_CLKDIV_0_DIVH_CLK4_CLK_CLK	CLKDIV_0	352
PARENT	AM62LX_DEV_CLKDIV_0	AM62LX_DEV_COMPUTE_CLUSTER0_CLKDIV_0_DIVP_CLK1_CLK_CLK	CLKDIV_0	353
PARENT	AM62LX_DEV_PBIST_0	AM62LX_DEV_COMPUTE_CLUSTER0_PBIST_0_DIVH_CLK4_CLK_CLK	PBIST_0	354
PARENT	AM62LX_DEV_PBIST_0	AM62LX_DEV_COMPUTE_CLUSTER0_PBIST_0_DIVP_CLK1_CLK_CLK	PBIST_0	355
PARENT	AM62LX_DEV_A53_0	AM62LX_DEV_COMPUTE_CLUSTER0_A53_0_A53_CORE0_ARM_CLK_CLK	A53_0	356
PARENT	AM62LX_DEV_A53_1	AM62LX_DEV_COMPUTE_CLUSTER0_A53_1_A53_CORE1_ARM_CLK_CLK	A53_1	357
PARENT	AM62LX_DEV_UART0	AM62LX_DEV_UART0_FCLK_CLK	UART0	358
PARENT	AM62LX_DEV_UART0	AM62LX_DEV_UART0_VBUSP_CLK	UART0	359
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_AUDIO_EXT_REFCLK0_IN	BOARD0	360
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_AUDIO_EXT_REFCLK1_IN	BOARD0	361
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_CLKOUT0_IN_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK5	BOARD0	362
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_CLKOUT0_IN_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK10	BOARD0	363
MUX	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_CLKOUT0_IN	BOARD0	364
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_GPMC0_CLKLB_IN	BOARD0	365
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_GPMC0_CLK_IN	BOARD0	366
MUX	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_GPMC0_FCLK_MUX_IN	BOARD0	367
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_I2C0_SCL_IN	BOARD0	368
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_I2C1_SCL_IN	BOARD0	369
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_I2C2_SCL_IN	BOARD0	370
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_I2C3_SCL_IN	BOARD0	371
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP0_ACLKR_IN	BOARD0	372
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP0_ACLKX_IN	BOARD0	373
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP0_AFSR_IN	BOARD0	374
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP0_AFSX_IN	BOARD0	375
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP1_ACLKR_IN	BOARD0	376
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP1_ACLKX_IN	BOARD0	377
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP1_AFSR_IN	BOARD0	378
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP1_AFSX_IN	BOARD0	379
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP2_ACLKR_IN	BOARD0	380
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP2_ACLKX_IN	BOARD0	381
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP2_AFSR_IN	BOARD0	382
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP2_AFSX_IN	BOARD0	383
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MDIO0_MDC_IN	BOARD0	384
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC0_CLKLB_IN	BOARD0	385
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC0_CLK_IN	BOARD0	386
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC1_CLKLB_IN	BOARD0	387
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC1_CLK_IN	BOARD0	388
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC2_CLKLB_IN	BOARD0	389
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC2_CLK_IN	BOARD0	390
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_OBSCLK0_IN	BOARD0	391
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_OBSCLK1_IN	BOARD0	392
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_OSPI0_CLK_IN	BOARD0	393
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_OSPI0_LBCLKO_IN	BOARD0	394
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_SPI0_CLK_IN	BOARD0	395
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_SPI1_CLK_IN	BOARD0	396
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_SPI2_CLK_IN	BOARD0	397
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_SPI3_CLK_IN	BOARD0	398
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_TIMER_IO0_IN	BOARD0	399
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_TIMER_IO1_IN	BOARD0	400
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_TIMER_IO2_IN	BOARD0	401
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_TIMER_IO3_IN	BOARD0	402
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_TRC_CLK_IN	BOARD0	403
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_CLKOUT0_IN_PARENT_WKUP_CLKOUT_SEL_OUT0	BOARD0	404
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_CLKOUT0_IN_PARENT_GLUELOGIC_HFOSC0_CLK	BOARD0	405
MUX	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_CLKOUT0_IN	BOARD0	406
MUX	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_OBSCLK0_IN_PARENT_WKUP_OBSCLK_MUX_SEL_OUT0	BOARD0	407
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_OBSCLK0_IN_PARENT_GLUELOGIC_HFOSC0_CLK	BOARD0	408
MUX	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_OBSCLK0_IN	BOARD0	409
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_SYSCLKOUT0_IN	BOARD0	410
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_AUDIO_EXT_REFCLK0_OUT	BOARD0	411
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_AUDIO_EXT_REFCLK1_OUT	BOARD0	412
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_CP_GEMAC_CPTS0_RFT_CLK_OUT	BOARD0	413
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_EXT_REFCLK1_OUT	BOARD0	414
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_GPMC0_CLKLB_OUT	BOARD0	415
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_I2C0_SCL_OUT	BOARD0	416
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_I2C1_SCL_OUT	BOARD0	417
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_I2C2_SCL_OUT	BOARD0	418
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_I2C3_SCL_OUT	BOARD0	419
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP0_ACLKR_OUT	BOARD0	420
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP0_ACLKX_OUT	BOARD0	421
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP0_AFSR_OUT	BOARD0	422
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP0_AFSX_OUT	BOARD0	423
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP1_ACLKR_OUT	BOARD0	424
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP1_ACLKX_OUT	BOARD0	425
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP1_AFSR_OUT	BOARD0	426
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP1_AFSX_OUT	BOARD0	427
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP2_ACLKR_OUT	BOARD0	428
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP2_ACLKX_OUT	BOARD0	429
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP2_AFSR_OUT	BOARD0	430
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MCASP2_AFSX_OUT	BOARD0	431
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC0_CLKLB_OUT	BOARD0	432
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC0_CLK_OUT	BOARD0	433
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC1_CLKLB_OUT	BOARD0	434
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC1_CLK_OUT	BOARD0	435
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC2_CLKLB_OUT	BOARD0	436
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_MMC2_CLK_OUT	BOARD0	437
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_OSPI0_DQS_OUT	BOARD0	438
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_OSPI0_LBCLKO_OUT	BOARD0	439
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_RMII1_REF_CLK_OUT	BOARD0	440
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_RMII2_REF_CLK_OUT	BOARD0	441
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_TCK_OUT	BOARD0	442
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_VOUT0_EXTPCLKIN_OUT	BOARD0	443
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_EXT_REFCLK0_OUT	BOARD0	444
PARENT	AM62LX_DEV_BOARD0	AM62LX_DEV_BOARD0_WKUP_I2C0_SCL_OUT	BOARD0	445
PARENT	AM62LX_DEV_WK_GTCCLK_VD	AM62LX_DEV_WKUP_GTCCLK_SEL_DEV_VD_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	WKUP_GTCCLK_SEL_DEV_VD	446
PARENT	AM62LX_DEV_WK_GTCCLK_VD	AM62LX_DEV_WKUP_GTCCLK_SEL_DEV_VD_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK	WKUP_GTCCLK_SEL_DEV_VD	447
PARENT	AM62LX_DEV_WK_GTCCLK_VD	AM62LX_DEV_WKUP_GTCCLK_SEL_DEV_VD_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT	WKUP_GTCCLK_SEL_DEV_VD	448
PARENT	AM62LX_DEV_WK_GTCCLK_VD	AM62LX_DEV_WKUP_GTCCLK_SEL_DEV_VD_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	WKUP_GTCCLK_SEL_DEV_VD	449
PARENT	AM62LX_DEV_WK_GTCCLK_VD	AM62LX_DEV_WKUP_GTCCLK_SEL_DEV_VD_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	WKUP_GTCCLK_SEL_DEV_VD	450
PARENT	AM62LX_DEV_WK_GTCCLK_VD	AM62LX_DEV_WKUP_GTCCLK_SEL_DEV_VD_CLK_PARENT_SAM62_PLL_CTRL_WRAP_WKUP_0_CHIP_DIV1_CLK_CLK2	WKUP_GTCCLK_SEL_DEV_VD	451
MUX	AM62LX_DEV_WK_GTCCLK_VD	AM62LX_DEV_WKUP_GTCCLK_SEL_DEV_VD_CLK	WKUP_GTCCLK_SEL_DEV_VD	452
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	WKUP_OBSCLK_MUX_SEL_DEV_VD	453
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT8_CLK	WKUP_OBSCLK_MUX_SEL_DEV_VD	454
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT0_CLK	WKUP_OBSCLK_MUX_SEL_DEV_VD	455
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT4_CLK	WKUP_OBSCLK_MUX_SEL_DEV_VD	456
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT0_CLK_DUP0	WKUP_OBSCLK_MUX_SEL_DEV_VD	457
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3	WKUP_OBSCLK_MUX_SEL_DEV_VD	458
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	WKUP_OBSCLK_MUX_SEL_DEV_VD	459
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV0_16FFT_WKUP_32KHZ_GEN_0_HSDIVOUT0_CLK8	WKUP_OBSCLK_MUX_SEL_DEV_VD	460
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV0_16FFT_WKUP_0_HSDIVOUT0_CLK	WKUP_OBSCLK_MUX_SEL_DEV_VD	461
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK_PARENT_CLK_32K_RC_SEL_OUT0	WKUP_OBSCLK_MUX_SEL_DEV_VD	462
MUX	AM62LX_DEV_WK_OBSCLK_MUX	AM62LX_DEV_WKUP_OBSCLK_MUX_SEL_DEV_VD_CLK	WKUP_OBSCLK_MUX_SEL_DEV_VD	463
PARENT	AM62LX_DEV_WK_CLKOUT_VD	AM62LX_DEV_WKUP_CLKOUT_SEL_DEV_VD_CLK_PARENT_RTCSS_WKUP_0_OSC_32K_CLK	WKUP_CLKOUT_SEL_DEV_VD	464
PARENT	AM62LX_DEV_WK_CLKOUT_VD	AM62LX_DEV_WKUP_CLKOUT_SEL_DEV_VD_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	WKUP_CLKOUT_SEL_DEV_VD	465
PARENT	AM62LX_DEV_WK_CLKOUT_VD	AM62LX_DEV_WKUP_CLKOUT_SEL_DEV_VD_CLK_PARENT_HSDIV0_16FFT_WKUP_0_HSDIVOUT0_CLK2	WKUP_CLKOUT_SEL_DEV_VD	466
PARENT	AM62LX_DEV_WK_CLKOUT_VD	AM62LX_DEV_WKUP_CLKOUT_SEL_DEV_VD_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT8_CLK	WKUP_CLKOUT_SEL_DEV_VD	467
PARENT	AM62LX_DEV_WK_CLKOUT_VD	AM62LX_DEV_WKUP_CLKOUT_SEL_DEV_VD_CLK_PARENT_CLK_32K_RC_SEL_OUT0	WKUP_CLKOUT_SEL_DEV_VD	468
PARENT	AM62LX_DEV_WK_CLKOUT_VD	AM62LX_DEV_WKUP_CLKOUT_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	WKUP_CLKOUT_SEL_DEV_VD	469
PARENT	AM62LX_DEV_WK_CLKOUT_VD	AM62LX_DEV_WKUP_CLKOUT_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	WKUP_CLKOUT_SEL_DEV_VD	470
MUX	AM62LX_DEV_WK_CLKOUT_VD	AM62LX_DEV_WKUP_CLKOUT_SEL_DEV_VD_CLK	WKUP_CLKOUT_SEL_DEV_VD	471
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT0_CLK	OBSCLK0_MUX_SEL_DEV_VD	472
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF1	OBSCLK0_MUX_SEL_DEV_VD	473
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV0_16FFT_MAIN_17_HSDIVOUT0_CLK	OBSCLK0_MUX_SEL_DEV_VD	474
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3	OBSCLK0_MUX_SEL_DEV_VD	475
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_SAM62L_A53_256KB_WRAP_MAIN_0_ARM_COREPACK_0_A53_DIVH_CLK4_OBSCLK_OUT_CLK	OBSCLK0_MUX_SEL_DEV_VD	476
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV4_16FFT_MAIN_0_HSDIVOUT2_CLK	OBSCLK0_MUX_SEL_DEV_VD	477
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	OBSCLK0_MUX_SEL_DEV_VD	478
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV0_16FFT_WKUP_32KHZ_GEN_0_HSDIVOUT0_CLK8	OBSCLK0_MUX_SEL_DEV_VD	479
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT0_CLK	OBSCLK0_MUX_SEL_DEV_VD	480
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	OBSCLK0_MUX_SEL_DEV_VD	481
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF0	OBSCLK0_MUX_SEL_DEV_VD	482
MUX	AM62LX_DEV_OBSCLK0_MUX	AM62LX_DEV_OBSCLK0_MUX_SEL_DEV_VD_CLK	OBSCLK0_MUX_SEL_DEV_VD	483
PARENT	AM62LX_DEV_CLK_32K_RC	AM62LX_DEV_CLK_32K_RC_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3	CLK_32K_RC	484
PARENT	AM62LX_DEV_CLK_32K_RC	AM62LX_DEV_CLK_32K_RC_SEL_DEV_VD_CLK_PARENT_HSDIV0_16FFT_WKUP_32KHZ_GEN_0_HSDIVOUT0_CLK8	CLK_32K_RC	485
PARENT	AM62LX_DEV_CLK_32K_RC	AM62LX_DEV_CLK_32K_RC_SEL_DEV_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3_DUP0	CLK_32K_RC	486
PARENT	AM62LX_DEV_CLK_32K_RC	AM62LX_DEV_CLK_32K_RC_SEL_DEV_VD_CLK_PARENT_RTCSS_WKUP_0_OSC_32K_CLK	CLK_32K_RC	487
MUX	AM62LX_DEV_CLK_32K_RC	AM62LX_DEV_CLK_32K_RC_SEL_DEV_VD_CLK	CLK_32K_RC	488
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	TIMER1_CLKSEL_VD	489
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_CLK_32K_RC_SEL_OUT0	TIMER1_CLKSEL_VD	490
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF0	TIMER1_CLKSEL_VD	491
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF1	TIMER1_CLKSEL_VD	492
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK	TIMER1_CLKSEL_VD	493
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	TIMER1_CLKSEL_VD	494
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	TIMER1_CLKSEL_VD	495
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	TIMER1_CLKSEL_VD	496
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT	TIMER1_CLKSEL_VD	497
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT1_CLK	TIMER1_CLKSEL_VD	498
PARENT	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	TIMER1_CLKSEL_VD	499
MUX	AM62LX_DEV_TIMER1_VD	AM62LX_DEV_TIMER1_CLKSEL_VD_CLK	TIMER1_CLKSEL_VD	500
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	TIMER3_CLKSEL_VD	501
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_CLK_32K_RC_SEL_OUT0	TIMER3_CLKSEL_VD	502
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF0	TIMER3_CLKSEL_VD	503
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF1	TIMER3_CLKSEL_VD	504
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_POSTDIV4_16FF_MAIN_0_HSDIVOUT6_CLK	TIMER3_CLKSEL_VD	505
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	TIMER3_CLKSEL_VD	506
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	TIMER3_CLKSEL_VD	507
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_BOARD_0_EXT_REFCLK1_OUT	TIMER3_CLKSEL_VD	508
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_BOARD_0_CP_GEMAC_CPTS0_RFT_CLK_OUT	TIMER3_CLKSEL_VD	509
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_HSDIV4_16FFT_WKUP_0_HSDIVOUT1_CLK	TIMER3_CLKSEL_VD	510
PARENT	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	TIMER3_CLKSEL_VD	511
MUX	AM62LX_DEV_TIMER3_VD	AM62LX_DEV_TIMER3_CLKSEL_VD_CLK	TIMER3_CLKSEL_VD	512
PARENT	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK_PARENT_GLUELOGIC_HFOSC0_CLK	WKUP_TIMER1_CLKSEL_VD	513
PARENT	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK_PARENT_SAM62_PLL_CTRL_WRAP_WKUP_0_CHIP_DIV1_CLK_CLK2	WKUP_TIMER1_CLKSEL_VD	514
PARENT	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLKOUT	WKUP_TIMER1_CLKSEL_VD	515
PARENT	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK_PARENT_POSTDIV4_16FF_WKUP_0_HSDIVOUT7_CLK	WKUP_TIMER1_CLKSEL_VD	516
PARENT	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK_PARENT_BOARD_0_WKUP_EXT_REFCLK0_OUT	WKUP_TIMER1_CLKSEL_VD	517
PARENT	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK_PARENT_CLK_32K_RC_SEL_OUT0	WKUP_TIMER1_CLKSEL_VD	518
PARENT	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK_PARENT_CPSW_3GUSS_AM62L_MAIN_0_CPTS_GENF0	WKUP_TIMER1_CLKSEL_VD	519
PARENT	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK_PARENT_GLUELOGIC_RCOSC_CLK_1P0V_97P65K3	WKUP_TIMER1_CLKSEL_VD	520
MUX	AM62LX_DEV_WKUP_TIMER_VD	AM62LX_DEV_WKUP_TIMER1_CLKSEL_VD_CLK	WKUP_TIMER1_CLKSEL_VD	521